1283     if (isGPR64<RegClassID>() && getShiftExtendType() == AArch64_AM::LSL &&  in isGPR64WithShiftExtend()
1336     return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR ||  in isShifter()
1383             ET == AArch64_AM::LSL) &&  in isExtend()
1402             ET == AArch64_AM::LSL) &&  in isExtendLSL64()
1410     return (ET == AArch64_AM::LSL || ET == AArch64_AM::SXTX) &&  in isMemXExtend()
1431     return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR ||  in isArithmeticShifter()
1442     return (ST == AArch64_AM::LSL || ST == AArch64_AM::LSR ||  in isLogicalShifter()
1453     if (ST != AArch64_AM::LSL)  in isMovImm32Shifter()
1465     if (ST != AArch64_AM::LSL)  in isMovImm64Shifter()
1477     return getShiftExtendType() == AArch64_AM::LSL &&  in isLogicalVecShifter()
1487     return getShiftExtendType() == AArch64_AM::LSL &&  in isLogicalVecHalfWordShifter()
1899     if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTW;  in addExtendOperands()
1907     if (ET == AArch64_AM::LSL) ET = AArch64_AM::UXTX;  in addExtend64Operands()
1982             AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL,  in CreateReg()
2001                   AArch64_AM::ShiftExtendType ExtTy = AArch64_AM::LSL,  in CreateVectorReg()
3198           .Case("lsl", AArch64_AM::LSL)  in tryParseOptionalShiftExtend()
3222     if (ShOp == AArch64_AM::LSL || ShOp == AArch64_AM::LSR ||  in tryParseOptionalShiftExtend()
4401           Operands.push_back(AArch64Operand::CreateShiftExtend(AArch64_AM::LSL,  in parseOperand()