Lines Matching refs:RegSize

121 static bool splitBitmaskImm(T Imm, unsigned RegSize, T &Imm1Enc, T &Imm2Enc) {  in splitBitmaskImm()  argument
123 if (AArch64_AM::isLogicalImmediate(UImm, RegSize)) in splitBitmaskImm()
128 AArch64_IMM::expandMOVImm(UImm, RegSize, Insn); in splitBitmaskImm()
150 if (!AArch64_AM::isLogicalImmediate(NewImm2, RegSize)) in splitBitmaskImm()
153 Imm1Enc = AArch64_AM::encodeLogicalImmediate(NewImm1, RegSize); in splitBitmaskImm()
154 Imm2Enc = AArch64_AM::encodeLogicalImmediate(NewImm2, RegSize); in splitBitmaskImm()
173 [Opc](T Imm, unsigned RegSize, T &Imm0, T &Imm1) -> Optional<OpcodePair> { in visitAND() argument
174 if (splitBitmaskImm(Imm, RegSize, Imm0, Imm1)) in visitAND()
254 static bool splitAddSubImm(T Imm, unsigned RegSize, T &Imm0, T &Imm1) { in splitAddSubImm() argument
263 AArch64_IMM::expandMOVImm(Imm, RegSize, Insn); in splitAddSubImm()
291 [PosOpc, NegOpc](T Imm, unsigned RegSize, T &Imm0, in visitADDSUB()
293 if (splitAddSubImm(Imm, RegSize, Imm0, Imm1)) in visitADDSUB()
295 if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1)) in visitADDSUB()
323 T Imm, unsigned RegSize, T &Imm0, T &Imm1) -> Optional<OpcodePair> { in visitADDSSUBS() argument
325 if (splitAddSubImm(Imm, RegSize, Imm0, Imm1)) in visitADDSSUBS()
327 else if (splitAddSubImm(-Imm, RegSize, Imm0, Imm1)) in visitADDSSUBS()
399 unsigned RegSize = sizeof(T) * 8; in splitTwoPartImm() local
400 assert((RegSize == 32 || RegSize == 64) && in splitTwoPartImm()
417 if (auto R = SplitAndOpc(Imm, RegSize, Imm0, Imm1)) in splitTwoPartImm()