691       MRI.constrainRegClass(SrcReg, &AArch64::GPR64spRegClass);  in insertSelect()
697       MRI.constrainRegClass(SrcReg, &AArch64::GPR32spRegClass);  in insertSelect()
737   if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) {  in insertSelect()
741   } else if (MRI.constrainRegClass(DstReg, &AArch64::GPR32RegClass)) {  in insertSelect()
745   } else if (MRI.constrainRegClass(DstReg, &AArch64::FPR64RegClass)) {  in insertSelect()
748   } else if (MRI.constrainRegClass(DstReg, &AArch64::FPR32RegClass)) {  in insertSelect()
776   MRI.constrainRegClass(TrueReg, RC);  in insertSelect()
777   MRI.constrainRegClass(FalseReg, RC);  in insertSelect()
1200                !MRI->constrainRegClass(Reg, OpRegCstraints))  in UpdateOperandRegClass()
3814         MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR32RegClass);  in storeRegToStackSlot()
3824         MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in storeRegToStackSlot()
3968         MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR32RegClass);  in loadRegFromStackSlot()
3978         MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass);  in loadRegFromStackSlot()
4433       MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
4437       MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
5483     MRI.constrainRegClass(ResultReg, RC);  in genFusedMultiply()
5485     MRI.constrainRegClass(SrcReg0, RC);  in genFusedMultiply()
5487     MRI.constrainRegClass(SrcReg1, RC);  in genFusedMultiply()
5489     MRI.constrainRegClass(SrcReg2, RC);  in genFusedMultiply()
5535   MRI.constrainRegClass(DupSrcReg, RC);  in genIndexedMultiply()
5662     MRI.constrainRegClass(ResultReg, RC);  in genMaddR()
5664     MRI.constrainRegClass(SrcReg0, RC);  in genMaddR()
5666     MRI.constrainRegClass(SrcReg1, RC);  in genMaddR()
5668     MRI.constrainRegClass(VR, RC);  in genMaddR()