Lines Matching refs:GPR64RegClass

737   if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) {  in insertSelect()
738 RC = &AArch64::GPR64RegClass; in insertSelect()
2037 AArch64::GPR64RegClass.contains(DstReg)); in isGPRCopy()
3709 AArch64::GPR64RegClass.contains(SrcReg)) { in copyPhysReg()
3714 if (AArch64::GPR64RegClass.contains(DestReg) && in copyPhysReg()
3735 assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy"); in copyPhysReg()
3744 assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy"); in copyPhysReg()
3824 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in storeRegToStackSlot()
3978 MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass); in loadRegFromStackSlot()
4287 &AArch64::GPR64RegClass); in emitFrameOffsetAdj()
4433 MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
4437 MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass); in foldMemoryOperandImpl()
4522 SpillRC = &AArch64::GPR64RegClass; in foldMemoryOperandImpl()
5772 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5787 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5813 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5855 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5879 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5905 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
6944 for (unsigned Reg : AArch64::GPR64RegClass) { in findRegisterToSaveLRTo()
7495 for (unsigned Reg : AArch64::GPR64RegClass) { in isMBBSafeToOutlineFrom()