Lines Matching refs:setCondCodeAction

1336       setCondCodeAction(ISD::SETO, VT, Expand);  in AArch64TargetLowering()
1337 setCondCodeAction(ISD::SETOLT, VT, Expand); in AArch64TargetLowering()
1338 setCondCodeAction(ISD::SETLT, VT, Expand); in AArch64TargetLowering()
1339 setCondCodeAction(ISD::SETOLE, VT, Expand); in AArch64TargetLowering()
1340 setCondCodeAction(ISD::SETLE, VT, Expand); in AArch64TargetLowering()
1341 setCondCodeAction(ISD::SETULT, VT, Expand); in AArch64TargetLowering()
1342 setCondCodeAction(ISD::SETULE, VT, Expand); in AArch64TargetLowering()
1343 setCondCodeAction(ISD::SETUGE, VT, Expand); in AArch64TargetLowering()
1344 setCondCodeAction(ISD::SETUGT, VT, Expand); in AArch64TargetLowering()
1345 setCondCodeAction(ISD::SETUEQ, VT, Expand); in AArch64TargetLowering()
1346 setCondCodeAction(ISD::SETONE, VT, Expand); in AArch64TargetLowering()
1593 setCondCodeAction(ISD::SETO, VT, Expand); in addTypeForFixedLengthSVE()
1594 setCondCodeAction(ISD::SETOLT, VT, Expand); in addTypeForFixedLengthSVE()
1595 setCondCodeAction(ISD::SETLT, VT, Expand); in addTypeForFixedLengthSVE()
1596 setCondCodeAction(ISD::SETOLE, VT, Expand); in addTypeForFixedLengthSVE()
1597 setCondCodeAction(ISD::SETLE, VT, Expand); in addTypeForFixedLengthSVE()
1598 setCondCodeAction(ISD::SETULT, VT, Expand); in addTypeForFixedLengthSVE()
1599 setCondCodeAction(ISD::SETULE, VT, Expand); in addTypeForFixedLengthSVE()
1600 setCondCodeAction(ISD::SETUGE, VT, Expand); in addTypeForFixedLengthSVE()
1601 setCondCodeAction(ISD::SETUGT, VT, Expand); in addTypeForFixedLengthSVE()
1602 setCondCodeAction(ISD::SETUEQ, VT, Expand); in addTypeForFixedLengthSVE()
1603 setCondCodeAction(ISD::SETONE, VT, Expand); in addTypeForFixedLengthSVE()