Lines Matching refs:getValVT
5874 assert(VA.getValVT().isScalableVector() && in LowerFormalArguments()
5878 ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
5887 ArgValue = DAG.getZExtOrTrunc(ArgValue, DL, VA.getValVT()); in LowerFormalArguments()
5895 : VA.getValVT().getSizeInBits()) / 8; in LowerFormalArguments()
5909 MVT MemVT = VA.getValVT(); in LowerFormalArguments()
5919 assert(VA.getValVT().isScalableVector() && in LowerFormalArguments()
5940 assert(VA.getValVT().isScalableVector() && in LowerFormalArguments()
5943 uint64_t PartSize = VA.getValVT().getStoreSize().getKnownMinSize(); in LowerFormalArguments()
5951 MVT PartLoad = VA.getValVT(); in LowerFormalArguments()
6194 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in LowerCallResult()
6203 Val = DAG.getZExtOrTrunc(Val, DL, VA.getValVT()); in LowerCallResult()
6407 A.getValVT().isScalableVector()) && in isEligibleForTailCallOptimization()
6662 assert(VA.getValVT() == MVT::i32 && "only expect 32 -> 64 upper bits"); in LowerCall()
6677 assert(VA.getValVT().isScalableVector() && in LowerCall()
6680 uint64_t StoreSize = VA.getValVT().getStoreSize().getKnownMinSize(); in LowerCall()
6691 Type *Ty = EVT(VA.getValVT()).getTypeForEVT(*DAG.getContext()); in LowerCall()
6774 : VA.getValVT().getSizeInBits(); in LowerCall()
6818 if (VA.getValVT() == MVT::i1 || VA.getValVT() == MVT::i8 || in LowerCall()
6819 VA.getValVT() == MVT::i16) in LowerCall()
6820 Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg); in LowerCall()
7021 assert(VA.getValVT() == MVT::i32 && "only expect 32 -> 64 upper bits"); in LowerReturn()