897   setTargetDAGCombine({ISD::SELECT, ISD::VSELECT});  in AArch64TargetLowering()
1493   setOperationAction(ISD::VSELECT, VT, Expand);  in addTypeForNEON()
1710   setOperationAction(ISD::VSELECT, VT, Custom);  in addTypeForFixedLengthSVE()
5595   case ISD::VSELECT:  in LowerOperation()
8349     return DAG.getNode(ISD::VSELECT, DL, Ty, SplatPred, TVal, FVal);  in LowerSELECT()
8360     return DAG.getNode(ISD::VSELECT, DL, Ty, SplatPred, TVal, FVal);  in LowerSELECT()
11745     return DAG.getNode(ISD::VSELECT, DL, VT, PTrue, ScalableVec1, Vec0);  in LowerINSERT_SUBVECTOR()
16713     return DAG.getNode(ISD::VSELECT, SDLoc(N), N->getValueType(0),  in performIntrinsicCombine()
18316   if (FirstUse->getOpcode() != ISD::VSELECT)  in tryToWidenSetCCOperands()
18322         return N->getOpcode() != ISD::VSELECT || N->getValueType(0) != UseMVT;  in tryToWidenSetCCOperands()
18659   return DAG.getNode(ISD::VSELECT, SDLoc(N), NTy,  in trySwapVSelectOperands()
18731   return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC,  in performVSelectCombine()
19554   case ISD::VSELECT:  in PerformDAGCombine()
21513   auto ScalableRes = DAG.getNode(ISD::VSELECT, DL, ContainerVT,  in LowerFixedLengthVectorSelectToSVE()