Lines Matching refs:UINT_TO_FP

476   setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);  in AArch64TargetLowering()
477 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); in AArch64TargetLowering()
478 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); in AArch64TargetLowering()
876 ISD::UINT_TO_FP}); in AArch64TargetLowering()
970 {ISD::FP_TO_SINT, ISD::FP_TO_UINT, ISD::SINT_TO_FP, ISD::UINT_TO_FP, in AArch64TargetLowering()
978 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v4i8, MVT::v4i32); in AArch64TargetLowering()
984 for (auto Op : {ISD::SINT_TO_FP, ISD::UINT_TO_FP, ISD::STRICT_SINT_TO_FP, in AArch64TargetLowering()
993 setOperationAction(ISD::UINT_TO_FP, MVT::v8i8, Custom); in AArch64TargetLowering()
995 setOperationAction(ISD::UINT_TO_FP, MVT::v16i8, Custom); in AArch64TargetLowering()
997 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); in AArch64TargetLowering()
999 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom); in AArch64TargetLowering()
1004 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i8, MVT::v8i32); in AArch64TargetLowering()
1005 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v16i8, MVT::v16i32); in AArch64TargetLowering()
1007 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v4i16, MVT::v4i32); in AArch64TargetLowering()
1010 setOperationPromotedToType(ISD::UINT_TO_FP, MVT::v8i16, MVT::v8i32); in AArch64TargetLowering()
1154 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in AArch64TargetLowering()
1238 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in AArch64TargetLowering()
1693 setOperationAction(ISD::UINT_TO_FP, VT, Custom); in addTypeForFixedLengthSVE()
5496 case ISD::UINT_TO_FP: in LowerOperation()
14537 (Opc != ISD::SINT_TO_FP && Opc != ISD::UINT_TO_FP)) in performFDivCombine()
19525 case ISD::UINT_TO_FP: in PerformDAGCombine()