Lines Matching refs:TLO
1736 TargetLowering::TargetLoweringOpt &TLO, in optimizeLogicalImm() argument
1815 New = TLO.DAG.getNode(Op.getOpcode(), DL, VT, Op.getOperand(0), in optimizeLogicalImm()
1816 TLO.DAG.getConstant(NewImm, DL, VT)); in optimizeLogicalImm()
1821 SDValue EncConst = TLO.DAG.getTargetConstant(Enc, DL, VT); in optimizeLogicalImm()
1823 TLO.DAG.getMachineNode(NewOpc, DL, VT, Op.getOperand(0), EncConst), 0); in optimizeLogicalImm()
1826 return TLO.CombineTo(Op, New); in optimizeLogicalImm()
1831 TargetLoweringOpt &TLO) const { in targetShrinkDemandedConstant()
1833 if (!TLO.LegalOps) in targetShrinkDemandedConstant()
1869 return optimizeLogicalImm(Op, Size, Imm, DemandedBits, TLO, NewOpc); in targetShrinkDemandedConstant()
17535 TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), in performTBISimplification() local
17538 if (TLI.SimplifyDemandedBits(Addr, DemandedMask, Known, TLO)) { in performTBISimplification()
17539 DCI.CommitTargetLoweringOpt(TLO); in performTBISimplification()
21907 const APInt &OriginalDemandedElts, KnownBits &Known, TargetLoweringOpt &TLO, in SimplifyDemandedBitsForTargetNode() argument
21941 return TLO.CombineTo(Op, ShiftR->getOperand(0)); in SimplifyDemandedBitsForTargetNode()
21946 Op, OriginalDemandedBits, OriginalDemandedElts, Known, TLO, Depth); in SimplifyDemandedBitsForTargetNode()