1562 bool AArch64TargetLowering::shouldExpandGetActiveLaneMask(EVT ResVT,  in shouldExpandGetActiveLaneMask()  argument
1570   if (ResVT != MVT::nxv2i1 && ResVT != MVT::nxv4i1 && ResVT != MVT::nxv8i1 &&  in shouldExpandGetActiveLaneMask()
1571       ResVT != MVT::nxv16i1 && ResVT != MVT::v2i1 && ResVT != MVT::v4i1 &&  in shouldExpandGetActiveLaneMask()
1572       ResVT != MVT::v8i1 && ResVT != MVT::v16i1)  in shouldExpandGetActiveLaneMask()
13742 bool AArch64TargetLowering::isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,  in isExtractSubvectorCheap()  argument
13744   if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))  in isExtractSubvectorCheap()
13747   return (Index == 0 || Index == ResVT.getVectorMinNumElements());  in isExtractSubvectorCheap()
17276   EVT ResVT = N->getValueType(0);  in performUzpCombine()  local
17281     switch (ResVT.getSimpleVT().SimpleTy) {  in performUzpCombine()
17300       return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Trunc,  in performUzpCombine()
17309       return DAG.getNode(AArch64ISD::UZP1, DL, ResVT, X, Op1);  in performUzpCombine()
17317       return DAG.getNode(AArch64ISD::UZP1, DL, ResVT, Op0, Z);  in performUzpCombine()
17349   EVT ResVT = N->getValueType(0);  in performGLD1Combine()  local
17373       return DAG.getNode(NewOpc, DL, {ResVT, MVT::Other},  in performGLD1Combine()
18719   EVT ResVT = N->getValueType(0);  in performVSelectCombine()  local
18723   if (ResVT.getSizeInBits() != CmpVT.getSizeInBits())  in performVSelectCombine()
18731   return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC,  in performVSelectCombine()
18743   EVT ResVT = N->getValueType(0);  in performSelectCombine()  local
18748   if (ResVT.isScalableVector())  in performSelectCombine()
18767   int NumMaskElts = ResVT.getSizeInBits() / SrcVT.getSizeInBits();  in performSelectCombine()
18768   if (!ResVT.isVector() || NumMaskElts == 0)  in performSelectCombine()
18777   if (CCVT.getSizeInBits() != ResVT.getSizeInBits())  in performSelectCombine()
18797                      ResVT.changeVectorElementTypeToInteger(), Mask);  in performSelectCombine()
18799   return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2));  in performSelectCombine()
19776       EVT ResVT = N->getValueType(0);  in PerformDAGCombine()  local
19777       uint64_t NumLanes = ResVT.getVectorElementCount().getKnownMinValue();  in PerformDAGCombine()
19780           DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ResVT, Src1, ExtIdx);  in PerformDAGCombine()
21396   EVT ResVT = SrcVT.getVectorElementType();  in LowerVECREDUCE_SEQ_FADD()  local
21415   return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResVT, Rdx, Zero);  in LowerVECREDUCE_SEQ_FADD()
21476   EVT ResVT = (Opcode == AArch64ISD::UADDV_PRED) ? MVT::i64 :  in LowerReductionToSVE()  local
21480     RdxVT = getPackedSVEVectorVT(ResVT);  in LowerReductionToSVE()
21484   SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResVT,  in LowerReductionToSVE()
21488   if (ResVT != ScalarOp.getValueType())  in LowerReductionToSVE()