Lines Matching refs:LowerReductionToSVE
12185 return LowerReductionToSVE(AArch64ISD::UADDV_PRED, Op, DAG); in LowerVECREDUCE()
12187 return LowerReductionToSVE(AArch64ISD::ANDV_PRED, Op, DAG); in LowerVECREDUCE()
12189 return LowerReductionToSVE(AArch64ISD::ORV_PRED, Op, DAG); in LowerVECREDUCE()
12191 return LowerReductionToSVE(AArch64ISD::SMAXV_PRED, Op, DAG); in LowerVECREDUCE()
12193 return LowerReductionToSVE(AArch64ISD::SMINV_PRED, Op, DAG); in LowerVECREDUCE()
12195 return LowerReductionToSVE(AArch64ISD::UMAXV_PRED, Op, DAG); in LowerVECREDUCE()
12197 return LowerReductionToSVE(AArch64ISD::UMINV_PRED, Op, DAG); in LowerVECREDUCE()
12199 return LowerReductionToSVE(AArch64ISD::EORV_PRED, Op, DAG); in LowerVECREDUCE()
12201 return LowerReductionToSVE(AArch64ISD::FADDV_PRED, Op, DAG); in LowerVECREDUCE()
12203 return LowerReductionToSVE(AArch64ISD::FMAXNMV_PRED, Op, DAG); in LowerVECREDUCE()
12205 return LowerReductionToSVE(AArch64ISD::FMINNMV_PRED, Op, DAG); in LowerVECREDUCE()
21461 SDValue AArch64TargetLowering::LowerReductionToSVE(unsigned Opcode, in LowerReductionToSVE() function in AArch64TargetLowering