Lines Matching refs:Lane
9433 unsigned Lane = V.getConstantOperandVal(1); in ReconstructShuffle() local
9437 unsigned InputBase = 16 * S + Lane * InputSize / 8; in ReconstructShuffle()
10191 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); in GeneratePerfectShuffle() local
10192 return DAG.getNode(Opcode, dl, VT, OpLHS, Lane); in GeneratePerfectShuffle()
10311 static SDValue constructDup(SDValue V, int Lane, SDLoc dl, EVT VT, in constructDup() argument
10349 if (getScaledOffsetDup(V, Lane, CastVT)) { in constructDup()
10355 Lane += V.getConstantOperandVal(1); in constructDup()
10360 unsigned Idx = Lane >= (int)VT.getVectorNumElements() / 2; in constructDup()
10361 Lane -= Idx * VT.getVectorNumElements() / 2; in constructDup()
10367 return DAG.getNode(Opcode, dl, VT, V, DAG.getConstant(Lane, dl, MVT::i64)); in constructDup()
10474 int Lane = SVN->getSplatIndex(); in LowerVECTOR_SHUFFLE() local
10476 if (Lane == -1) in LowerVECTOR_SHUFFLE()
10477 Lane = 0; in LowerVECTOR_SHUFFLE()
10479 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) in LowerVECTOR_SHUFFLE()
10485 !isa<ConstantSDNode>(V1.getOperand(Lane))) in LowerVECTOR_SHUFFLE()
10486 return DAG.getNode(AArch64ISD::DUP, dl, VT, V1.getOperand(Lane)); in LowerVECTOR_SHUFFLE()
10490 return constructDup(V1, Lane, dl, VT, Opcode, DAG); in LowerVECTOR_SHUFFLE()
10495 unsigned Lane = 0; in LowerVECTOR_SHUFFLE() local
10496 if (isWideDUPMask(ShuffleMask, VT, LaneSize, Lane)) { in LowerVECTOR_SHUFFLE()
10506 V1 = constructDup(V1, Lane, dl, NewVecTy, Opcode, DAG); in LowerVECTOR_SHUFFLE()
11079 for (SDValue Lane : Op->ops()) { in NormalizeBuildVector() local
11084 if (auto *CstLane = dyn_cast<ConstantSDNode>(Lane)) { in NormalizeBuildVector()
11087 Lane = DAG.getConstant(LowBits.getZExtValue(), dl, MVT::i32); in NormalizeBuildVector()
11088 } else if (Lane.getNode()->isUndef()) { in NormalizeBuildVector()
11089 Lane = DAG.getUNDEF(MVT::i32); in NormalizeBuildVector()
11091 assert(Lane.getValueType() == MVT::i32 && in NormalizeBuildVector()
11094 Ops.push_back(Lane); in NormalizeBuildVector()
11321 SDValue Lane = Value.getOperand(1); in LowerBUILD_VECTOR() local
11331 return DAG.getNode(Opcode, dl, VT, Value, Lane); in LowerBUILD_VECTOR()
15434 SDValue Lane = Op1.getOperand(1); in tryCombineFixedPointConvert() local
15454 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResTy, Convert, Lane); in tryCombineFixedPointConvert()
17442 SDValue Lane; in performPostLD1Combine() local
17444 Lane = N->getOperand(2); in performPostLD1Combine()
17445 auto *LaneC = dyn_cast<ConstantSDNode>(Lane); in performPostLD1Combine()
17502 Ops.push_back(Lane); // The lane to be inserted in the vector in performPostLD1Combine()