Lines Matching refs:INSERT_VECTOR_ELT

900                        ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT,  in AArch64TargetLowering()
1232 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); in AArch64TargetLowering()
1480 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); in addTypeForNEON()
1703 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom); in addTypeForFixedLengthSVE()
5454 case ISD::INSERT_VECTOR_ELT: in LowerOperation()
10144 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Input.getValueType(), OpLHS, in GeneratePerfectShuffle()
10592 ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, in LowerVECTOR_SHUFFLE()
11385 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx); in LowerBUILD_VECTOR()
11418 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, NewVector, in LowerBUILD_VECTOR()
11461 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
11510 assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT && "Unknown opcode!"); in LowerINSERT_VECTOR_ELT()
11529 DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, VectorVT, ExtendedVector, in LowerINSERT_VECTOR_ELT()
11555 SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, in LowerINSERT_VECTOR_ELT()
16388 InitVal = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ReduceVT, in combineSVEReductionOrderedFP()
17115 if (StVal.getOpcode() != ISD::INSERT_VECTOR_ELT) in replaceSplatVectorStore()
19335 assert(N->getOpcode() == ISD::INSERT_VECTOR_ELT && "Unexpected node!"); in removeRedundantInsertVectorElt()
19618 case ISD::INSERT_VECTOR_ELT: in PerformDAGCombine()
21296 auto ScalableRes = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ContainerVT, Op0, in LowerFixedLengthInsertVectorElt()
21408 AccOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ContainerVT, in LowerVECREDUCE_SEQ_FADD()