Lines Matching refs:FP_EXTEND
452 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom); in AArch64TargetLowering()
673 setOperationAction(ISD::FP_EXTEND, MVT::v8f16, Expand); in AArch64TargetLowering()
905 setTargetDAGCombine(ISD::FP_EXTEND); in AArch64TargetLowering()
1315 setOperationAction(ISD::FP_EXTEND, VT, Custom); in AArch64TargetLowering()
1657 setOperationAction(ISD::FP_EXTEND, VT, Custom); in addTypeForFixedLengthSVE()
2893 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in emitComparison()
2894 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in emitComparison()
3001 LHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, LHS); in emitConditionalComparison()
3002 RHS = DAG.getNode(ISD::FP_EXTEND, DL, MVT::f32, RHS); in emitConditionalComparison()
3755 DAG.getNode(ISD::FP_EXTEND, dl, NewVT, Op.getOperand(0))); in LowerVectorFP_TO_INT()
3786 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
3828 DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, SrcVal)); in LowerFP_TO_INT()
3867 SrcVal = DAG.getNode(ISD::FP_EXTEND, SDLoc(Op), F32VT, SrcVal); in LowerVectorFP_TO_INT_SAT()
3926 SrcVal = DAG.getNode(ISD::FP_EXTEND, SDLoc(Op), MVT::f32, SrcVal); in LowerFP_TO_INT_SAT()
5442 case ISD::FP_EXTEND: in LowerOperation()
6674 Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
7733 In2 = DAG.getNode(ISD::FP_EXTEND, DL, VT, In2); in LowerFCOPYSIGN()
8103 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS); in LowerSELECT_CC()
8104 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS); in LowerSELECT_CC()
12115 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::v4f32, LHS); in LowerVSETCC()
12116 RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::v4f32, RHS); in LowerVSETCC()
19571 case ISD::FP_EXTEND: in PerformDAGCombine()
19896 } else if (Copy->getOpcode() != ISD::FP_EXTEND) in isUsedByReturnOnly()