Lines Matching defs:VT
132 static inline EVT getPackedSVEVectorVT(EVT VT) { in getPackedSVEVectorVT()
172 static inline EVT getPromotedVTForPredicate(EVT VT) { in getPromotedVTForPredicate()
194 static inline bool isPackedVectorType(EVT VT, SelectionDAG &DAG) { in isPackedVectorType()
365 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
369 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
518 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
543 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
821 for (MVT VT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
827 for (MVT VT : MVT::integer_valuetypes()) in AArch64TargetLowering() local
1078 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
1254 for (MVT VT : MVT::scalable_vector_valuetypes()) { in AArch64TargetLowering() local
1375 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
1378 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
1453 void AArch64TargetLowering::addTypeForNEON(MVT VT) { in addTypeForNEON()
1582 void AArch64TargetLowering::addTypeForFixedLengthSVE(MVT VT) { in addTypeForFixedLengthSVE()
1715 void AArch64TargetLowering::addDRTypeForNEON(MVT VT) { in addDRTypeForNEON()
1720 void AArch64TargetLowering::addQRTypeForNEON(MVT VT) { in addQRTypeForNEON()
1808 EVT VT = Op.getValueType(); in optimizeLogicalImm() local
1839 EVT VT = Op.getValueType(); in targetShrinkDemandedConstant() local
1940 EVT VT = cast<MemIntrinsicSDNode>(Op)->getMemoryVT(); in computeKnownBitsForTargetNode() local
1960 MVT VT = Op.getOperand(1).getValueType().getSimpleVT(); in computeKnownBitsForTargetNode() local
1984 EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags, in allowsMisalignedMemoryAccesses()
2867 EVT VT = LHS.getValueType(); in emitStrictFPComparison() local
2887 EVT VT = LHS.getValueType(); in emitComparison() local
3251 EVT VT = Op.getValueType(); in getCmpOperandFoldingProfit() local
3263 EVT VT = RHS.getValueType(); in getAArch64Cmp() local
3568 EVT VT = Value.getValueType(); in valueToCarryFlag() local
3578 static SDValue carryFlagToValue(SDValue Flag, EVT VT, SelectionDAG &DAG, in carryFlagToValue()
3590 static SDValue overflowFlagToValue(SDValue Flag, EVT VT, SelectionDAG &DAG) { in overflowFlagToValue()
3686 EVT VT = Op.getValueType(); in LowerFP_EXTEND() local
3728 EVT VT = Op.getValueType(); in LowerVectorFP_TO_INT() local
3970 EVT VT = Op.getValueType(); in LowerVectorINT_TO_FP() local
4189 EVT VT = N->getValueType(0); in isExtendedBUILD_VECTOR() local
4222 EVT VT = N->getValueType(0); in skipExtensionForVectorMULL() local
4340 EVT VT = Op.getValueType(); in LowerMUL() local
4415 static inline SDValue getPTrue(SelectionDAG &DAG, SDLoc DL, EVT VT, in getPTrue()
4425 static SDValue getSVEPredicateBitCast(EVT VT, SDValue Op, SelectionDAG &DAG) { in getSVEPredicateBitCast()
4844 bool AArch64TargetLowering::shouldExtendGSIndex(EVT VT, EVT &EltTy) const { in shouldExtendGSIndex()
4931 EVT VT = Op.getValueType(); in LowerMGATHER() local
5030 EVT VT = StoreVal.getValueType(); in LowerMSCATTER() local
5104 EVT VT = Op->getValueType(0); in LowerMLOAD() local
5130 EVT VT, EVT MemVT, in LowerTruncateVectorStore()
5171 EVT VT = Value.getValueType(); in LowerSTORE() local
5290 EVT VT = Op->getValueType(0); in LowerLOAD() local
5320 MVT VT = Op.getSimpleValueType(); in LowerABS() local
5633 EVT VT, bool OverrideNEON) const { in useSVEForFixedLengthVectorVT()
7724 EVT VT = Op.getValueType(); in LowerFCOPYSIGN() local
7744 auto BitCast = [this](EVT VT, SDValue Op, SelectionDAG &DAG) { in LowerFCOPYSIGN()
7826 EVT VT = Op.getValueType(); in LowerCTPOP_PARITY() local
7889 EVT VT = Op.getValueType(); in LowerCTTZ() local
7902 EVT VT = Op.getValueType(); in LowerMinMax() local
7948 EVT VT = Op.getValueType(); in LowerBitreverse() local
8013 EVT VT = Op.getValueType(); in LowerSETCC() local
8121 EVT VT = LHS.getValueType(); in LowerSELECT_CC() local
8237 EVT VT = TVal.getValueType(); in LowerSELECT_CC() local
8245 EVT VT = TVal.getValueType(); in LowerSELECT_CC() local
8601 EVT VT = Op.getValueType(); in LowerVAARG() local
8670 EVT VT = Op.getValueType(); in LowerFRAMEADDR() local
8690 EVT VT = getPointerTy(DAG.getDataLayout()); in LowerSPONENTRY() local
8702 getRegisterByName(const char* RegName, LLT VT, const MachineFunction &MF) const { in getRegisterByName()
8720 EVT VT = Op.getValueType(); in LowerADDROFRETURNADDR() local
8736 EVT VT = Op.getValueType(); in LowerRETURNADDR() local
8785 bool AArch64TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT, in isFPImmLegal()
8829 EVT VT = Operand.getValueType(); in getEstimate() local
8854 EVT VT = Op.getValueType(); in getSqrtInputTest() local
8876 EVT VT = Operand.getValueType(); in getSqrtEstimate() local
8906 EVT VT = Operand.getValueType(); in getRecipEstimate() local
9323 EVT VT = V64Reg.getValueType(); in WidenVector() local
9343 EVT VT = V128Reg.getValueType(); in NarrowVector() local
9359 EVT VT = Op.getValueType(); in ReconstructShuffle() local
9643 static bool isSingletonEXTMask(ArrayRef<int> M, EVT VT, unsigned &Imm) { in isSingletonEXTMask()
9726 static bool isWideDUPMask(ArrayRef<int> M, EVT VT, unsigned BlockSize, in isWideDUPMask()
9799 static bool isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT, in isEXTMask()
9840 static bool isREVMask(ArrayRef<int> M, EVT VT, unsigned BlockSize) { in isREVMask()
9867 static bool isZIPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isZIPMask()
9883 static bool isUZPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isUZPMask()
9896 static bool isTRNMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isTRNMask()
9912 static bool isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isZIP_v_undef_Mask()
9931 static bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isUZP_v_undef_Mask()
9950 static bool isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { in isTRN_v_undef_Mask()
10002 static bool isConcatMask(ArrayRef<int> Mask, EVT VT, bool SplitLHS) { in isConcatMask()
10024 EVT VT = Op.getValueType(); in tryFormConcatFromShuffle() local
10106 EVT VT = OpLHS.getValueType(); in GeneratePerfectShuffle() local
10154 EVT VT = OpLHS.getValueType(); in GeneratePerfectShuffle() local
10311 static SDValue constructDup(SDValue V, int Lane, SDLoc dl, EVT VT, in constructDup()
10373 static bool isWideTypeMask(ArrayRef<int> M, EVT VT, in isWideTypeMask()
10420 EVT VT = Op.getValueType(); in tryWidenMaskForShuffle() local
10453 EVT VT = Op.getValueType(); in LowerVECTOR_SHUFFLE() local
10625 EVT VT = Op.getValueType(); in LowerSPLAT_VECTOR() local
10658 EVT VT = Op.getValueType(); in LowerDUPQLane() local
10702 EVT VT = BVN->getValueType(0); in resolveBuildVector() local
10727 EVT VT = Op.getValueType(); in tryAdvSIMDModImm64() local
10749 EVT VT = Op.getValueType(); in tryAdvSIMDModImm32() local
10797 EVT VT = Op.getValueType(); in tryAdvSIMDModImm16() local
10836 EVT VT = Op.getValueType(); in tryAdvSIMDModImm321s() local
10867 EVT VT = Op.getValueType(); in tryAdvSIMDModImm8() local
10888 EVT VT = Op.getValueType(); in tryAdvSIMDModImmFP() local
10925 EVT VT = Bvec->getValueType(0); in isAllConstantBuildVector() local
10941 EVT VT = N->getValueType(0); in tryLowerToSLI() local
11031 EVT VT = Op.getValueType(); in LowerVectorOR() local
11072 EVT VT = Op.getValueType(); in NormalizeBuildVector() local
11100 EVT VT = Op.getValueType(); in ConstantBuildVector() local
11142 EVT VT = Op.getValueType(); in LowerBUILD_VECTOR() local
11516 EVT VT = Op.getOperand(0).getValueType(); in LowerINSERT_VECTOR_ELT() local
11565 EVT VT = Op.getOperand(0).getValueType(); in LowerEXTRACT_VECTOR_ELT() local
11671 EVT VT = Op.getValueType(); in LowerINSERT_SUBVECTOR() local
11783 EVT VT = Op.getValueType(); in LowerDIV() local
11889 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) { in isVShiftLImm()
11900 static bool isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, int64_t &Cnt) { in isVShiftRImm()
11910 EVT VT = Op.getValueType(); in LowerTRUNCATE() local
11933 EVT VT = Op.getValueType(); in LowerVectorSRA_SRL_SHL() local
11988 AArch64CC::CondCode CC, bool NoNans, EVT VT, in EmitVectorComparison()
12249 MVT VT = Op.getSimpleValueType(); in LowerATOMIC_LOAD_SUB() local
12266 MVT VT = Op.getSimpleValueType(); in LowerATOMIC_LOAD_AND() local
12315 EVT VT = Node->getValueType(0); in LowerDYNAMIC_STACKALLOC() local
12351 EVT VT = Op.getValueType(); in LowerVSCALE() local
12367 const EVT VT = TLI.getMemValueType(DL, CI.getArgOperand(0)->getType()); in setInfoSVEStN() local
13380 EVT VT, SelectionDAG &DAG, in LowerSVEStructLoad()
13422 auto AlignmentIsAcceptable = [&](EVT VT, Align AlignCheck) { in getOptimalMemOpType()
13452 auto AlignmentIsAcceptable = [&](EVT VT, Align AlignCheck) { in getOptimalMemOpLLT()
13495 const EVT VT = AddNode.getValueType(); in isMulAddWithConstProfitable() local
13634 EVT VT, CodeGenOpt::Level OptLevel) const { in generateFMAsInMachineCombiner()
13658 EVT VT = N->getValueType(0); in isDesirableToCommuteWithShift() local
13709 EVT VT = N->getValueType(0); in shouldFoldConstantShiftPairToMask() local
13756 EVT VT = N->getValueType(0); in foldVectorXorShiftIntoCmp() local
13925 EVT VT = A.getValueType(); in performUADDVCombine() local
13987 EVT VT = N->getValueType(0); in BuildSDIVPow2() local
14036 EVT VT = N->getValueType(0); in BuildSREMPow2() local
14145 EVT VT = BV.getValueType(); in performBuildShuffleExtendCombine() local
14210 EVT VT = Mul->getValueType(0); in performMulVectorExtendCombine() local
14240 EVT VT = N->getValueType(0); in performMulCombine() local
14382 EVT VT = N->getValueType(0); in performVectorCompareAndMaskUnaryOpCombine() local
14422 EVT VT = N->getValueType(0); in performIntToFpCombine() local
14622 EVT VT = N->getValueType(0); in tryCombineToEXTR() local
14660 EVT VT = N->getValueType(0); in tryCombineToBSL() local
14759 EVT VT = N->getValueType(0); in performANDORCSELCombine() local
14818 EVT VT = N->getValueType(0); in performORCombine() local
14959 EVT VT = N->getValueType(0); in performANDCombine() local
15006 static bool hasPairwiseAdd(unsigned Opcode, EVT VT, bool FullFP16) { in hasPairwiseAdd()
15051 EVT VT = N0.getValueType(); in performFirstTrueTestVectorCombine() local
15118 EVT VT = N->getValueType(0); in performExtractVectorEltCombine() local
15180 EVT VT = N->getValueType(0); in performConcatVectorsCombine() local
15350 EVT VT = N->getValueType(0); in performExtractSubvectorCombine() local
15473 MVT VT = N.getSimpleValueType(); in tryExtendDUPToExtractHigh() local
15654 EVT VT = Op->getValueType(0); in performSetccAddFolding() local
15661 EVT VT = N->getValueType(0); in performAddUADDVCombine() local
15700 EVT VT = N->getValueType(0); in performAddCSelIntoCSinc() local
15773 EVT VT = N->getValueType(0); in performAddDotCombine() local
15800 EVT VT = Op.getValueType(); in getNegatedInteger() local
15832 EVT VT = CSel.getValueType(); in performNegCSelCombine() local
15854 MVT VT = N->getSimpleValueType(0); in performAddSubLongCombine() local
15947 EVT VT = N->getValueType(0); in foldADCToCINC() local
15960 EVT VT = N->getValueType(0); in performVectorAddSubExtCombine() local
16217 EVT VT = N->getValueType(0); in LowerSVEIntrinsicEXT() local
16250 EVT VT = N->getValueType(0); in tryConvertSVEWideCompare() local
16304 static SDValue getPTest(SelectionDAG &DAG, EVT VT, SDValue Pg, SDValue Op, in getPTest()
16480 EVT VT = N->getValueType(0); in performIntrinsicCombine() local
16893 EVT VT = N->getValueType(0); in performLD1Combine() local
16919 EVT VT = N->getValueType(0); in performLDNT1Combine() local
16948 EVT VT = N->getValueType(0); in performLD1ReplicateCombine() local
17024 EVT VT = StVal.getValueType(); in replaceZeroVectorStore() local
17091 EVT VT = StVal.getValueType(); in replaceSplatVectorStore() local
17151 EVT VT = StVal.getValueType(); in splitStores() local
17248 EVT VT = N->getValueType(0); in performUnpackCombine() local
17412 auto VT = CC->getValueType(0).getHalfNumVectorElementsVT(*DAG.getContext()); in performSunpkloCombine() local
17430 EVT VT = N->getValueType(0); in performPostLD1Combine() local
18361 EVT VT = N->getValueType(0); in performSETCCCombine() local
18424 EVT VT = N->getValueType(0); in performFlagSettingCombine() local
18688 EVT VT = CmpLHS.getValueType(); in performVSelectCombine() local
18804 EVT VT = N->getValueType(0); in performDUPCombine() local
19156 auto VT = cast<VTSDNode>(N->getOperand(1))->getVT(); in performSignExtendInRegCombine() local
19404 EVT VT = N->getValueType(0); in performFPExtendCombine() local
19435 EVT VT = N->getValueType(0); in performBSPExpandForSVE() local
19458 EVT VT = N->getValueType(0); in performDupLane128Combine() local
19826 EVT VT = Opnds[0].getValueType(); in PerformDAGCombine() local
19949 EVT VT; in getPreIndexedAddressParts() local
19970 EVT VT; in getPostIndexedAddressParts() local
19996 EVT VT = N->getValueType(0); in ReplaceBITCASTResults() local
20031 EVT VT = N->getValueType(0); in ReplaceAddWithADDP() local
20108 EVT VT = N->getValueType(0); in ReplaceExtractSubVectorResults() local
20323 EVT VT = N->getValueType(0); in ReplaceNodeResults() local
20768 bool AArch64TargetLowering::isIntDivCheap(EVT VT, AttributeList Attr) const { in isIntDivCheap()
20874 static EVT getContainerForFixedLengthVector(SelectionDAG &DAG, EVT VT) { in getContainerForFixedLengthVector()
20900 EVT VT) { in getPredicateForFixedLengthVector()
20944 EVT VT) { in getPredicateForScalableVector()
20951 static SDValue getPredicateForVector(SelectionDAG &DAG, SDLoc &DL, EVT VT) { in getPredicateForVector()
20959 static SDValue convertToScalableVector(SelectionDAG &DAG, EVT VT, SDValue V) { in convertToScalableVector()
20970 static SDValue convertFromScalableVector(SelectionDAG &DAG, EVT VT, SDValue V) { in convertFromScalableVector()
20986 EVT VT = Op.getValueType(); in LowerFixedLengthVectorLoadToSVE() local
21042 EVT VT = Op.getValueType(); in LowerFixedLengthVectorMLoadToSVE() local
21085 EVT VT = Store->getValue().getValueType(); in LowerFixedLengthVectorStoreToSVE() local
21114 EVT VT = Store->getValue().getValueType(); in LowerFixedLengthVectorMStoreToSVE() local
21129 EVT VT = Op.getValueType(); in LowerFixedLengthVectorIntDivideToSVE() local
21203 EVT VT = Op.getValueType(); in LowerFixedLengthVectorIntExtendToSVE() local
21239 EVT VT = Op.getValueType(); in LowerFixedLengthVectorTruncateToSVE() local
21275 EVT VT = Op.getValueType(); in LowerFixedLengthExtractVectorElt() local
21288 EVT VT = Op.getValueType(); in LowerFixedLengthInsertVectorElt() local
21308 EVT VT = Op.getValueType(); in LowerToPredicatedOp() local
21364 EVT VT = Op.getValueType(); in LowerToScalableOp() local
21423 EVT VT = ReduceOp.getValueType(); in LowerPredReductionToSVE() local
21497 EVT VT = Op.getValueType(); in LowerFixedLengthVectorSelectToSVE() local
21548 EVT VT = Op.getValueType(); in LowerFixedLengthBitcastToSVE() local
21568 EVT VT = Op.getValueType(); in LowerFixedLengthConcatVectorsToSVE() local
21595 EVT VT = Op.getValueType(); in LowerFixedLengthFPExtendToSVE() local
21620 EVT VT = Op.getValueType(); in LowerFixedLengthFPRoundToSVE() local
21644 EVT VT = Op.getValueType(); in LowerFixedLengthIntToFPToSVE() local
21689 EVT VT = Op.getValueType(); in LowerFixedLengthFPToIntToSVE() local
21732 EVT VT = Op.getValueType(); in LowerFixedLengthVECTOR_SHUFFLEToSVE() local
21854 SDValue AArch64TargetLowering::getSVESafeBitCast(EVT VT, SDValue Op, in getSVESafeBitCast()