Lines Matching refs:VT
169 EVT VT = N->getValueType(0); in SelectExtractHigh() local
172 if (!VT.is64BitVector() || !LVT.is128BitVector() || in SelectExtractHigh()
173 Index != VT.getVectorNumElements()) in SelectExtractHigh()
219 template<MVT::SimpleValueType VT>
221 return SelectSVEAddSubImm(N, VT, Imm, Shift); in SelectSVEAddSubImm()
224 template <MVT::SimpleValueType VT>
226 return SelectSVECpyDupImm(N, VT, Imm, Shift); in SelectSVECpyDupImm()
229 template <MVT::SimpleValueType VT, bool Invert = false>
231 return SelectSVELogicalImm(N, VT, Imm, Invert); in SelectSVELogicalImm()
234 template <MVT::SimpleValueType VT>
236 return SelectSVEArithImm(N, VT, Imm); in SelectSVEArithImm()
406 bool SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, SDValue &Shift);
407 bool SelectSVECpyDupImm(SDValue N, MVT VT, SDValue &Imm, SDValue &Shift);
408 bool SelectSVELogicalImm(SDValue N, MVT VT, SDValue &Imm, bool Invert);
414 bool SelectSVEArithImm(SDValue N, MVT VT, SDValue &Imm);
1363 EVT VT = N->getValueType(0); in SelectTable() local
1378 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, Ops)); in SelectTable()
1385 EVT VT = LD->getMemoryVT(); in tryIndexedLoad() local
1397 if (VT == MVT::i64) in tryIndexedLoad()
1399 else if (VT == MVT::i32) { in tryIndexedLoad()
1411 } else if (VT == MVT::i16) { in tryIndexedLoad()
1424 } else if (VT == MVT::i8) { in tryIndexedLoad()
1437 } else if (VT == MVT::f16) { in tryIndexedLoad()
1439 } else if (VT == MVT::bf16) { in tryIndexedLoad()
1441 } else if (VT == MVT::f32) { in tryIndexedLoad()
1443 } else if (VT == MVT::f64 || VT.is64BitVector()) { in tryIndexedLoad()
1445 } else if (VT.is128BitVector()) { in tryIndexedLoad()
1485 EVT VT = N->getValueType(0); in SelectLoad() local
1497 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1514 EVT VT = N->getValueType(0); in SelectPostLoad() local
1536 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1572 EVT VT = N->getValueType(0); in SelectPredicatedLoad() local
1592 AArch64::zsub0 + i, DL, VT, SuperReg)); in SelectPredicatedLoad()
1603 EVT VT = N->getOperand(2)->getValueType(0); in SelectStore() local
1606 bool Is128Bit = VT.getSizeInBits() == 128; in SelectStore()
1665 EVT VT = N->getOperand(2)->getValueType(0); in SelectPostStore() local
1670 bool Is128Bit = VT.getSizeInBits() == 128; in SelectPostStore()
1693 EVT VT = V64Reg.getValueType(); in operator ()() local
1694 unsigned NarrowSize = VT.getVectorNumElements(); in operator ()()
1695 MVT EltTy = VT.getVectorElementType().getSimpleVT(); in operator ()()
1709 EVT VT = V128Reg.getValueType(); in NarrowVector() local
1710 unsigned WideSize = VT.getVectorNumElements(); in NarrowVector()
1711 MVT EltTy = VT.getVectorElementType().getSimpleVT(); in NarrowVector()
1721 EVT VT = N->getValueType(0); in SelectLoadLane() local
1722 bool Narrow = VT.getSizeInBits() == 64; in SelectLoadLane()
1760 EVT VT = N->getValueType(0); in SelectPostLoadLane() local
1761 bool Narrow = VT.getSizeInBits() == 64; in SelectPostLoadLane()
1815 EVT VT = N->getOperand(2)->getValueType(0); in SelectStoreLane() local
1816 bool Narrow = VT.getSizeInBits() == 64; in SelectStoreLane()
1844 EVT VT = N->getOperand(2)->getValueType(0); in SelectPostStoreLane() local
1845 bool Narrow = VT.getSizeInBits() == 64; in SelectPostStoreLane()
1883 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromAnd() local
1888 assert((VT == MVT::i32 || VT == MVT::i64) && in isBitfieldExtractOpFromAnd()
1916 if (VT == MVT::i64 && Op0->getOpcode() == ISD::ANY_EXTEND && in isBitfieldExtractOpFromAnd()
1923 } else if (VT == MVT::i32 && Op0->getOpcode() == ISD::TRUNCATE && in isBitfieldExtractOpFromAnd()
1930 VT = Opd0->getValueType(0); in isBitfieldExtractOpFromAnd()
1933 ClampMSB = (VT == MVT::i32); in isBitfieldExtractOpFromAnd()
1946 if (!BiggerPattern && (SrlImm <= 0 || SrlImm >= VT.getSizeInBits())) { in isBitfieldExtractOpFromAnd()
1954 MSB = SrlImm + (VT == MVT::i32 ? countTrailingOnes<uint32_t>(AndImm) in isBitfieldExtractOpFromAnd()
1964 Opc = VT == MVT::i32 ? AArch64::UBFMWri : AArch64::UBFMXri; in isBitfieldExtractOpFromAnd()
1973 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromSExtInReg() local
1974 unsigned BitWidth = VT.getSizeInBits(); in isBitfieldExtractOpFromSExtInReg()
1975 assert((VT == MVT::i32 || VT == MVT::i64) && in isBitfieldExtractOpFromSExtInReg()
1981 VT = Op->getValueType(0); in isBitfieldExtractOpFromSExtInReg()
1982 BitWidth = VT.getSizeInBits(); in isBitfieldExtractOpFromSExtInReg()
1994 Opc = (VT == MVT::i32) ? AArch64::SBFMWri : AArch64::SBFMXri; in isBitfieldExtractOpFromSExtInReg()
2053 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromShr() local
2058 assert((VT == MVT::i32 || VT == MVT::i64) && in isBitfieldExtractOpFromShr()
2070 } else if (VT == MVT::i32 && N->getOpcode() == ISD::SRL && in isBitfieldExtractOpFromShr()
2077 TruncBits = Opd0->getValueType(0).getSizeInBits() - VT.getSizeInBits(); in isBitfieldExtractOpFromShr()
2078 VT = Opd0.getValueType(); in isBitfieldExtractOpFromShr()
2079 assert(VT == MVT::i64 && "the promoted type should be i64"); in isBitfieldExtractOpFromShr()
2090 if (ShlImm >= VT.getSizeInBits()) { in isBitfieldExtractOpFromShr()
2101 assert(SrlImm > 0 && SrlImm < VT.getSizeInBits() && in isBitfieldExtractOpFromShr()
2104 Immr = immr < 0 ? immr + VT.getSizeInBits() : immr; in isBitfieldExtractOpFromShr()
2105 Imms = VT.getSizeInBits() - ShlImm - TruncBits - 1; in isBitfieldExtractOpFromShr()
2107 if (VT == MVT::i32) in isBitfieldExtractOpFromShr()
2117 EVT VT = N->getValueType(0); in tryBitfieldExtractOpFromSExt() local
2119 if (VT != MVT::i64 || NarrowVT != MVT::i32) in tryBitfieldExtractOpFromSExt()
2132 SDValue Ops[] = {Opd0, CurDAG->getTargetConstant(Immr, dl, VT), in tryBitfieldExtractOpFromSExt()
2133 CurDAG->getTargetConstant(Imms, dl, VT)}; in tryBitfieldExtractOpFromSExt()
2134 CurDAG->SelectNodeTo(N, AArch64::SBFMXri, VT, Ops); in tryBitfieldExtractOpFromSExt()
2145 EVT VT = N->getValueType(0); in tryHighFPExt() local
2147 if ((VT != MVT::v2f64 || NarrowVT != MVT::v2f32) && in tryHighFPExt()
2148 (VT != MVT::v4f32 || NarrowVT != MVT::v4f16)) in tryHighFPExt()
2162 auto Opcode = VT == MVT::v2f64 ? AArch64::FCVTLv4i32 : AArch64::FCVTLv8i16; in tryHighFPExt()
2163 CurDAG->SelectNodeTo(N, Opcode, VT, Extract.getOperand(0)); in tryHighFPExt()
2214 EVT VT = N->getValueType(0); in tryBitfieldExtractOp() local
2219 if ((Opc == AArch64::SBFMXri || Opc == AArch64::UBFMXri) && VT == MVT::i32) { in tryBitfieldExtractOp()
2230 SDValue Ops[] = {Opd0, CurDAG->getTargetConstant(Immr, dl, VT), in tryBitfieldExtractOp()
2231 CurDAG->getTargetConstant(Imms, dl, VT)}; in tryBitfieldExtractOp()
2232 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryBitfieldExtractOp()
2241 unsigned NumberOfIgnoredHighBits, EVT VT) { in isBitfieldDstMask() argument
2242 assert((VT == MVT::i32 || VT == MVT::i64) && in isBitfieldDstMask()
2244 unsigned BitWidth = VT.getSizeInBits() - NumberOfIgnoredHighBits; in isBitfieldDstMask()
2478 EVT VT = Op.getValueType(); in getLeftShift() local
2480 unsigned BitWidth = VT.getSizeInBits(); in getLeftShift()
2487 UBFMOpc, dl, VT, Op, in getLeftShift()
2488 CurDAG->getTargetConstant(BitWidth - ShlAmount, dl, VT), in getLeftShift()
2489 CurDAG->getTargetConstant(BitWidth - 1 - ShlAmount, dl, VT)); in getLeftShift()
2495 UBFMOpc, dl, VT, Op, CurDAG->getTargetConstant(ShrAmount, dl, VT), in getLeftShift()
2496 CurDAG->getTargetConstant(BitWidth - 1, dl, VT)); in getLeftShift()
2508 EVT VT = Op.getValueType(); in isBitfieldPositioningOp() local
2509 unsigned BitWidth = VT.getSizeInBits(); in isBitfieldPositioningOp()
2555 static bool isShiftedMask(uint64_t Mask, EVT VT) { in isShiftedMask() argument
2556 assert(VT == MVT::i32 || VT == MVT::i64); in isShiftedMask()
2557 if (VT == MVT::i32) in isShiftedMask()
2567 EVT VT = N->getValueType(0); in tryBitfieldInsertOpFromOrAndImm() local
2568 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOrAndImm()
2571 unsigned BitWidth = VT.getSizeInBits(); in tryBitfieldInsertOpFromOrAndImm()
2599 if (!isShiftedMask(Known.Zero.getZExtValue(), VT)) in tryBitfieldInsertOpFromOrAndImm()
2639 unsigned MOVIOpc = VT == MVT::i32 ? AArch64::MOVi32imm : AArch64::MOVi64imm; in tryBitfieldInsertOpFromOrAndImm()
2641 MOVIOpc, DL, VT, CurDAG->getTargetConstant(BFIImm, DL, VT)); in tryBitfieldInsertOpFromOrAndImm()
2645 CurDAG->getTargetConstant(ImmR, DL, VT), in tryBitfieldInsertOpFromOrAndImm()
2646 CurDAG->getTargetConstant(ImmS, DL, VT)}; in tryBitfieldInsertOpFromOrAndImm()
2647 unsigned Opc = (VT == MVT::i32) ? AArch64::BFMWri : AArch64::BFMXri; in tryBitfieldInsertOpFromOrAndImm()
2648 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryBitfieldInsertOpFromOrAndImm()
2656 EVT VT = N->getValueType(0); in tryBitfieldInsertOpFromOr() local
2657 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOr()
2660 unsigned BitWidth = VT.getSizeInBits(); in tryBitfieldInsertOpFromOr()
2702 if ((BFXOpc != AArch64::UBFMXri && VT == MVT::i64) || in tryBitfieldInsertOpFromOr()
2703 (BFXOpc != AArch64::UBFMWri && VT == MVT::i32)) in tryBitfieldInsertOpFromOr()
2726 EVT VT = OrOpd1Val.getValueType(); in tryBitfieldInsertOpFromOr() local
2727 assert((VT == MVT::i32 || VT == MVT::i64) && "unexpected OR operand"); in tryBitfieldInsertOpFromOr()
2746 isBitfieldDstMask(Imm, BitsToBeInserted, NumberOfIgnoredHighBits, VT)) in tryBitfieldInsertOpFromOr()
2756 SDValue Ops[] = {Dst, Src, CurDAG->getTargetConstant(ImmR, DL, VT), in tryBitfieldInsertOpFromOr()
2757 CurDAG->getTargetConstant(ImmS, DL, VT)}; in tryBitfieldInsertOpFromOr()
2758 unsigned Opc = (VT == MVT::i32) ? AArch64::BFMWri : AArch64::BFMXri; in tryBitfieldInsertOpFromOr()
2759 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryBitfieldInsertOpFromOr()
2773 (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) { in tryBitfieldInsertOpFromOr()
2778 if (isShiftedMask(Mask0Imm, VT)) { in tryBitfieldInsertOpFromOr()
2791 unsigned ShiftOpc = (VT == MVT::i32) ? AArch64::UBFMWri : AArch64::UBFMXri; in tryBitfieldInsertOpFromOr()
2801 ShiftOpc, DL, VT, Src, CurDAG->getTargetConstant(LsrImm, DL, VT), in tryBitfieldInsertOpFromOr()
2802 CurDAG->getTargetConstant(BitWidth - 1, DL, VT)); in tryBitfieldInsertOpFromOr()
2810 CurDAG->getTargetConstant(ImmR, DL, VT), in tryBitfieldInsertOpFromOr()
2811 CurDAG->getTargetConstant(ImmS, DL, VT)}; in tryBitfieldInsertOpFromOr()
2812 unsigned Opc = (VT == MVT::i32) ? AArch64::BFMWri : AArch64::BFMXri; in tryBitfieldInsertOpFromOr()
2813 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryBitfieldInsertOpFromOr()
2846 EVT VT = N->getValueType(0); in tryBitfieldInsertInZeroOp() local
2847 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertInZeroOp()
2857 unsigned ImmR = (VT.getSizeInBits() - DstLSB) % VT.getSizeInBits(); in tryBitfieldInsertInZeroOp()
2862 SDValue Ops[] = {Op0, CurDAG->getTargetConstant(ImmR, DL, VT), in tryBitfieldInsertInZeroOp()
2863 CurDAG->getTargetConstant(ImmS, DL, VT)}; in tryBitfieldInsertInZeroOp()
2864 unsigned Opc = (VT == MVT::i32) ? AArch64::UBFMWri : AArch64::UBFMXri; in tryBitfieldInsertInZeroOp()
2865 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryBitfieldInsertInZeroOp()
2872 EVT VT = N->getValueType(0); in tryShiftAmountMod() local
2877 Opc = (VT == MVT::i32) ? AArch64::RORVWr : AArch64::RORVXr; in tryShiftAmountMod()
2880 Opc = (VT == MVT::i32) ? AArch64::LSLVWr : AArch64::LSLVXr; in tryShiftAmountMod()
2883 Opc = (VT == MVT::i32) ? AArch64::LSRVWr : AArch64::LSRVXr; in tryShiftAmountMod()
2886 Opc = (VT == MVT::i32) ? AArch64::ASRVWr : AArch64::ASRVXr; in tryShiftAmountMod()
2894 if (VT == MVT::i32) { in tryShiftAmountMod()
2897 } else if (VT == MVT::i64) { in tryShiftAmountMod()
2980 if (VT == MVT::i32) in tryShiftAmountMod()
2982 else if (VT == MVT::i64 && NewShiftAmt->getValueType(0) == MVT::i32) { in tryShiftAmountMod()
2985 AArch64::SUBREG_TO_REG, DL, VT, in tryShiftAmountMod()
2991 CurDAG->SelectNodeTo(N, Opc, VT, Ops); in tryShiftAmountMod()
3218 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVEAddSubImm() argument
3226 .trunc(VT.getFixedSizeInBits()) in SelectSVEAddSubImm()
3229 switch (VT.SimpleTy) { in SelectSVEAddSubImm()
3258 bool AArch64DAGToDAGISel::SelectSVECpyDupImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVECpyDupImm() argument
3266 .trunc(VT.getFixedSizeInBits()) in SelectSVECpyDupImm()
3269 switch (VT.SimpleTy) { in SelectSVECpyDupImm()
3310 bool AArch64DAGToDAGISel::SelectSVEArithImm(SDValue N, MVT VT, SDValue &Imm) { in SelectSVEArithImm() argument
3314 switch (VT.SimpleTy) { in SelectSVEArithImm()
3338 bool AArch64DAGToDAGISel::SelectSVELogicalImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVELogicalImm() argument
3348 switch (VT.SimpleTy) { in SelectSVELogicalImm()
3462 static SDNode *extractSubReg(SelectionDAG *DAG, EVT VT, SDValue V) { in extractSubReg() argument
3467 assert(VT.isFixedLengthVector() && in extractSubReg()
3471 switch (VT.getSizeInBits()) { in extractSubReg()
3474 return DAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, VT, V, SubReg); in extractSubReg()
3478 return DAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, VT, V, SubReg); in extractSubReg()
3482 return DAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, DL, VT, V, RC); in extractSubReg()
3489 static SDNode *insertSubReg(SelectionDAG *DAG, EVT VT, SDValue V) { in insertSubReg() argument
3490 assert(VT.isScalableVector() && in insertSubReg()
3491 VT.getSizeInBits().getKnownMinSize() == AArch64::SVEBitsPerBlock && in insertSubReg()
3500 auto Container = DAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, VT); in insertSubReg()
3501 return DAG->getMachineNode(TargetOpcode::INSERT_SUBREG, DL, VT, in insertSubReg()
3506 auto Container = DAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, VT); in insertSubReg()
3507 return DAG->getMachineNode(TargetOpcode::INSERT_SUBREG, DL, VT, in insertSubReg()
3512 return DAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, DL, VT, V, RC); in insertSubReg()
3526 EVT VT = Node->getValueType(0); in Select() local
3597 if (VT.isScalableVector() || InVT.isFixedLengthVector()) in Select()
3608 ReplaceNode(Node, extractSubReg(CurDAG, VT, Node->getOperand(0))); in Select()
3621 if (VT.isFixedLengthVector() || InVT.isScalableVector()) in Select()
3632 ReplaceNode(Node, insertSubReg(CurDAG, VT, Node->getOperand(1))); in Select()
3641 if (VT == MVT::i32) { in Select()
3646 } else if (VT == MVT::i64) { in Select()
3715 if (VT == MVT::v8i8) { in Select()
3718 } else if (VT == MVT::v16i8) { in Select()
3721 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3724 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3727 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3730 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3733 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3736 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3742 if (VT == MVT::v8i8) { in Select()
3745 } else if (VT == MVT::v16i8) { in Select()
3748 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3751 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3754 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3757 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3760 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3763 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3769 if (VT == MVT::v8i8) { in Select()
3772 } else if (VT == MVT::v16i8) { in Select()
3775 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3778 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3781 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3784 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3787 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3790 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3796 if (VT == MVT::v8i8) { in Select()
3799 } else if (VT == MVT::v16i8) { in Select()
3802 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3805 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3808 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3811 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3814 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3817 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3823 if (VT == MVT::v8i8) { in Select()
3826 } else if (VT == MVT::v16i8) { in Select()
3829 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3832 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3835 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3838 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3841 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3844 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3850 if (VT == MVT::v8i8) { in Select()
3853 } else if (VT == MVT::v16i8) { in Select()
3856 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3859 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3862 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3865 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3868 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3871 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3877 if (VT == MVT::v8i8) { in Select()
3880 } else if (VT == MVT::v16i8) { in Select()
3883 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3886 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3889 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3892 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3895 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3898 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3904 if (VT == MVT::v8i8) { in Select()
3907 } else if (VT == MVT::v16i8) { in Select()
3910 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3913 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3916 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3919 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3922 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3925 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3931 if (VT == MVT::v8i8) { in Select()
3934 } else if (VT == MVT::v16i8) { in Select()
3937 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
3940 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
3943 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
3946 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
3949 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
3952 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
3958 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
3961 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
3962 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
3965 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
3966 VT == MVT::v2f32) { in Select()
3969 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
3970 VT == MVT::v1f64) { in Select()
3976 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
3979 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
3980 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
3983 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
3984 VT == MVT::v2f32) { in Select()
3987 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
3988 VT == MVT::v1f64) { in Select()
3994 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
3997 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
3998 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4001 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4002 VT == MVT::v2f32) { in Select()
4005 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4006 VT == MVT::v1f64) { in Select()
4015 if (VT == MVT::nxv16i8) { in Select()
4019 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4020 VT == MVT::nxv8bf16) { in Select()
4024 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4028 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4036 if (VT == MVT::nxv16i8) { in Select()
4040 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4041 VT == MVT::nxv8bf16) { in Select()
4045 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4049 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4057 if (VT == MVT::nxv16i8) { in Select()
4061 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4062 VT == MVT::nxv8bf16) { in Select()
4066 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4070 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4107 VT == MVT::v8i8 ? AArch64::TBLv8i8Two : AArch64::TBLv16i8Two, in Select()
4111 SelectTable(Node, 3, VT == MVT::v8i8 ? AArch64::TBLv8i8Three in Select()
4116 SelectTable(Node, 4, VT == MVT::v8i8 ? AArch64::TBLv8i8Four in Select()
4122 VT == MVT::v8i8 ? AArch64::TBXv8i8Two : AArch64::TBXv16i8Two, in Select()
4126 SelectTable(Node, 3, VT == MVT::v8i8 ? AArch64::TBXv8i8Three in Select()
4131 SelectTable(Node, 4, VT == MVT::v8i8 ? AArch64::TBXv8i8Four in Select()
4146 VT = Node->getOperand(2)->getValueType(0); in Select()
4151 if (VT == MVT::v8i8) { in Select()
4154 } else if (VT == MVT::v16i8) { in Select()
4157 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4158 VT == MVT::v4bf16) { in Select()
4161 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4162 VT == MVT::v8bf16) { in Select()
4165 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4168 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4171 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4174 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4181 if (VT == MVT::v8i8) { in Select()
4184 } else if (VT == MVT::v16i8) { in Select()
4187 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4188 VT == MVT::v4bf16) { in Select()
4191 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4192 VT == MVT::v8bf16) { in Select()
4195 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4198 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4201 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4204 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4211 if (VT == MVT::v8i8) { in Select()
4214 } else if (VT == MVT::v16i8) { in Select()
4217 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4218 VT == MVT::v4bf16) { in Select()
4221 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4222 VT == MVT::v8bf16) { in Select()
4225 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4228 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4231 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4234 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4241 if (VT == MVT::v8i8) { in Select()
4244 } else if (VT == MVT::v16i8) { in Select()
4247 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4248 VT == MVT::v4bf16) { in Select()
4251 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4252 VT == MVT::v8bf16) { in Select()
4255 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4258 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4261 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4264 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4271 if (VT == MVT::v8i8) { in Select()
4274 } else if (VT == MVT::v16i8) { in Select()
4277 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4278 VT == MVT::v4bf16) { in Select()
4281 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4282 VT == MVT::v8bf16) { in Select()
4285 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4288 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4291 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4294 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4301 if (VT == MVT::v8i8) { in Select()
4304 } else if (VT == MVT::v16i8) { in Select()
4307 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4308 VT == MVT::v4bf16) { in Select()
4311 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || in Select()
4312 VT == MVT::v8bf16) { in Select()
4315 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4318 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4321 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4324 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4331 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4334 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4335 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4338 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4339 VT == MVT::v2f32) { in Select()
4342 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4343 VT == MVT::v1f64) { in Select()
4350 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4353 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4354 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4357 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4358 VT == MVT::v2f32) { in Select()
4361 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4362 VT == MVT::v1f64) { in Select()
4369 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4372 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4373 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4376 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4377 VT == MVT::v2f32) { in Select()
4380 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4381 VT == MVT::v1f64) { in Select()
4388 if (VT == MVT::nxv16i8) { in Select()
4391 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4392 VT == MVT::nxv8bf16) { in Select()
4395 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4398 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4405 if (VT == MVT::nxv16i8) { in Select()
4408 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4409 VT == MVT::nxv8bf16) { in Select()
4412 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4415 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4422 if (VT == MVT::nxv16i8) { in Select()
4425 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
4426 VT == MVT::nxv8bf16) { in Select()
4429 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
4432 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
4442 if (VT == MVT::v8i8) { in Select()
4445 } else if (VT == MVT::v16i8) { in Select()
4448 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4451 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4454 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4457 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4460 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4463 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4470 if (VT == MVT::v8i8) { in Select()
4473 } else if (VT == MVT::v16i8) { in Select()
4476 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4479 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4482 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4485 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4488 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4491 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4498 if (VT == MVT::v8i8) { in Select()
4501 } else if (VT == MVT::v16i8) { in Select()
4504 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4507 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4510 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4513 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4516 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4519 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4526 if (VT == MVT::v8i8) { in Select()
4529 } else if (VT == MVT::v16i8) { in Select()
4532 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4535 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4538 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4541 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4544 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4547 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4554 if (VT == MVT::v8i8) { in Select()
4557 } else if (VT == MVT::v16i8) { in Select()
4560 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4563 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4566 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4569 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4572 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4575 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4582 if (VT == MVT::v8i8) { in Select()
4585 } else if (VT == MVT::v16i8) { in Select()
4588 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4591 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4594 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4597 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4600 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4603 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4610 if (VT == MVT::v8i8) { in Select()
4613 } else if (VT == MVT::v16i8) { in Select()
4616 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4619 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4622 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4625 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4628 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4631 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4638 if (VT == MVT::v8i8) { in Select()
4641 } else if (VT == MVT::v16i8) { in Select()
4644 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4647 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4650 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4653 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4656 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4659 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4666 if (VT == MVT::v8i8) { in Select()
4669 } else if (VT == MVT::v16i8) { in Select()
4672 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4675 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4678 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4681 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4684 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4687 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4694 if (VT == MVT::v8i8) { in Select()
4697 } else if (VT == MVT::v16i8) { in Select()
4700 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4703 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4706 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4709 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4712 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4715 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4722 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4725 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4726 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4729 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4730 VT == MVT::v2f32) { in Select()
4733 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4734 VT == MVT::v1f64) { in Select()
4741 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4744 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4745 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4748 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4749 VT == MVT::v2f32) { in Select()
4752 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4753 VT == MVT::v1f64) { in Select()
4760 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4763 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4764 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4767 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4768 VT == MVT::v2f32) { in Select()
4771 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4772 VT == MVT::v1f64) { in Select()
4779 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4782 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4783 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4786 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4787 VT == MVT::v2f32) { in Select()
4790 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4791 VT == MVT::v1f64) { in Select()
4798 VT = Node->getOperand(1).getValueType(); in Select()
4799 if (VT == MVT::v8i8) { in Select()
4802 } else if (VT == MVT::v16i8) { in Select()
4805 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4808 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4811 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4814 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4817 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4820 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4827 VT = Node->getOperand(1).getValueType(); in Select()
4828 if (VT == MVT::v8i8) { in Select()
4831 } else if (VT == MVT::v16i8) { in Select()
4834 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4837 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4840 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4843 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4846 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4849 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4856 VT = Node->getOperand(1).getValueType(); in Select()
4857 if (VT == MVT::v8i8) { in Select()
4860 } else if (VT == MVT::v16i8) { in Select()
4863 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4866 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4869 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4872 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4875 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4878 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4885 VT = Node->getOperand(1).getValueType(); in Select()
4886 if (VT == MVT::v8i8) { in Select()
4889 } else if (VT == MVT::v16i8) { in Select()
4892 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4895 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4898 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4901 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4904 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4907 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4914 VT = Node->getOperand(1).getValueType(); in Select()
4915 if (VT == MVT::v8i8) { in Select()
4918 } else if (VT == MVT::v16i8) { in Select()
4921 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4924 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16 ) { in Select()
4927 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4930 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4933 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4936 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4943 VT = Node->getOperand(1).getValueType(); in Select()
4944 if (VT == MVT::v8i8) { in Select()
4947 } else if (VT == MVT::v16i8) { in Select()
4950 } else if (VT == MVT::v4i16 || VT == MVT::v4f16 || VT == MVT::v4bf16) { in Select()
4953 } else if (VT == MVT::v8i16 || VT == MVT::v8f16 || VT == MVT::v8bf16) { in Select()
4956 } else if (VT == MVT::v2i32 || VT == MVT::v2f32) { in Select()
4959 } else if (VT == MVT::v4i32 || VT == MVT::v4f32) { in Select()
4962 } else if (VT == MVT::v1i64 || VT == MVT::v1f64) { in Select()
4965 } else if (VT == MVT::v2i64 || VT == MVT::v2f64) { in Select()
4972 VT = Node->getOperand(1).getValueType(); in Select()
4973 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4976 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4977 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
4980 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
4981 VT == MVT::v2f32) { in Select()
4984 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
4985 VT == MVT::v1f64) { in Select()
4992 VT = Node->getOperand(1).getValueType(); in Select()
4993 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
4996 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
4997 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
5000 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
5001 VT == MVT::v2f32) { in Select()
5004 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
5005 VT == MVT::v1f64) { in Select()
5012 VT = Node->getOperand(1).getValueType(); in Select()
5013 if (VT == MVT::v16i8 || VT == MVT::v8i8) { in Select()
5016 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
5017 VT == MVT::v8f16 || VT == MVT::v4bf16 || VT == MVT::v8bf16) { in Select()
5020 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
5021 VT == MVT::v2f32) { in Select()
5024 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
5025 VT == MVT::v1f64) { in Select()
5032 if (VT == MVT::nxv16i8) { in Select()
5035 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
5036 VT == MVT::nxv8bf16) { in Select()
5039 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
5042 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
5049 if (VT == MVT::nxv16i8) { in Select()
5052 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
5053 VT == MVT::nxv8bf16) { in Select()
5056 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
5059 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()
5066 if (VT == MVT::nxv16i8) { in Select()
5069 } else if (VT == MVT::nxv8i16 || VT == MVT::nxv8f16 || in Select()
5070 VT == MVT::nxv8bf16) { in Select()
5073 } else if (VT == MVT::nxv4i32 || VT == MVT::nxv4f32) { in Select()
5076 } else if (VT == MVT::nxv2i64 || VT == MVT::nxv2f64) { in Select()