487   unsigned ShiftAmt;  in SelectArithImmed()  local
490     ShiftAmt = 0;  in SelectArithImmed()
492     ShiftAmt = 12;  in SelectArithImmed()
497   unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt);  in SelectArithImmed()
2326     uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue);  in getUsefulBitsFromOrWithShiftedReg()  local
2327     Mask <<= ShiftAmt;  in getUsefulBitsFromOrWithShiftedReg()
2329     Mask.lshrInPlace(ShiftAmt);  in getUsefulBitsFromOrWithShiftedReg()
2334     uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue);  in getUsefulBitsFromOrWithShiftedReg()  local
2335     Mask.lshrInPlace(ShiftAmt);  in getUsefulBitsFromOrWithShiftedReg()
2337     Mask <<= ShiftAmt;  in getUsefulBitsFromOrWithShiftedReg()
2903   SDValue ShiftAmt = N->getOperand(1);  in tryShiftAmountMod()  local
2908   if (ShiftAmt->getOpcode() == ISD::ZERO_EXTEND ||  in tryShiftAmountMod()
2909       ShiftAmt->getOpcode() == ISD::ANY_EXTEND)  in tryShiftAmountMod()
2910     ShiftAmt = ShiftAmt->getOperand(0);  in tryShiftAmountMod()
2912   if (ShiftAmt->getOpcode() == ISD::ADD || ShiftAmt->getOpcode() == ISD::SUB) {  in tryShiftAmountMod()
2913     SDValue Add0 = ShiftAmt->getOperand(0);  in tryShiftAmountMod()
2914     SDValue Add1 = ShiftAmt->getOperand(1);  in tryShiftAmountMod()
2921     } else if (ShiftAmt->getOpcode() == ISD::SUB &&  in tryShiftAmountMod()
2928       EVT SubVT = ShiftAmt->getValueType(0);  in tryShiftAmountMod()
2942     } else if (ShiftAmt->getOpcode() == ISD::SUB &&  in tryShiftAmountMod()
2948       EVT SubVT = ShiftAmt->getValueType(0);  in tryShiftAmountMod()
2969     if (!isOpcWithIntImmediate(ShiftAmt.getNode(), ISD::AND, MaskImm) &&  in tryShiftAmountMod()
2970         !isOpcWithIntImmediate(ShiftAmt.getNode(), AArch64ISD::ANDS, MaskImm))  in tryShiftAmountMod()
2976     NewShiftAmt = ShiftAmt->getOperand(0);  in tryShiftAmountMod()