Lines Matching refs:createResultReg
358 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastMaterializeAlloca()
381 Register ResultReg = createResultReg(RC); in materializeInt()
413 Register TmpReg = createResultReg(RC); in materializeFP()
417 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP()
430 Register ADRPReg = createResultReg(&AArch64::GPR64commonRegClass); in materializeFP()
435 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); in materializeFP()
458 Register ADRPReg = createResultReg(&AArch64::GPR64commonRegClass); in materializeGV()
469 ResultReg = createResultReg(&AArch64::GPR32RegClass); in materializeGV()
472 ResultReg = createResultReg(&AArch64::GPR64RegClass); in materializeGV()
485 Register Result64 = createResultReg(&AArch64::GPR64RegClass); in materializeGV()
499 ResultReg = createResultReg(&AArch64::GPR64spRegClass); in materializeGV()
1037 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); in simplifyAddress()
1304 ResultReg = createResultReg(RC); in emitAddSub_rr()
1349 ResultReg = createResultReg(RC); in emitAddSub_ri()
1390 ResultReg = createResultReg(RC); in emitAddSub_rs()
1434 ResultReg = createResultReg(RC); in emitAddSub_rx()
1844 Register ResultReg = createResultReg(RC); in emitLoad()
1859 Register Reg64 = createResultReg(&AArch64::GPR64RegClass); in emitLoad()
2526 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2545 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2566 Register TmpReg1 = createResultReg(&AArch64::GPR32RegClass); in selectCmp()
2779 Register ResultReg = createResultReg(&AArch64::FPR64RegClass); in selectFPExt()
2795 Register ResultReg = createResultReg(&AArch64::FPR32RegClass); in selectFPTrunc()
2828 Register ResultReg = createResultReg( in selectFPToInt()
2982 Register ResultReg = createResultReg(RC); in fastLowerArguments()
3107 Register ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall()
3226 Register ADRPReg = createResultReg(&AArch64::GPR64commonRegClass); in fastLowerCall()
3231 CallReg = createResultReg(&AArch64::GPR64RegClass); in fastLowerCall()
3448 Register ResultReg = createResultReg(&AArch64::GPR64spRegClass); in fastLowerIntrinsicCall()
3581 Register ResultReg = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall()
3740 ResultReg1 = createResultReg(TLI.getRegClassFor(VT)); in fastLowerIntrinsicCall()
3922 ResultReg = createResultReg(&AArch64::GPR32RegClass); in selectTrunc()
4043 Register ResultReg = createResultReg(RC); in emitLSL_ri()
4146 Register ResultReg = createResultReg(RC); in emitLSR_ri()
4262 Register ResultReg = createResultReg(RC); in emitASR_ri()
4466 Register Reg64 = createResultReg(&AArch64::GPR64RegClass); in optimizeIntExtLoad()
4509 Register ResultReg = createResultReg(&AArch64::GPR64RegClass); in selectIntExt()
5000 const Register ResultReg1 = createResultReg(ResRC); in selectAtomicCmpXchg()
5001 const Register ResultReg2 = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg()
5002 const Register ScratchReg = createResultReg(&AArch64::GPR32RegClass); in selectAtomicCmpXchg()