Lines Matching refs:UseAdd
202 unsigned emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS,
205 unsigned emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
208 unsigned emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
211 unsigned emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
215 unsigned emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
1137 unsigned AArch64FastISel::emitAddSub(bool UseAdd, MVT RetVT, const Value *LHS, in emitAddSub() argument
1164 if (UseAdd && isa<Constant>(LHS) && !isa<Constant>(RHS)) in emitAddSub()
1168 if (UseAdd && LHS->hasOneUse() && isValueAvailable(LHS)) in emitAddSub()
1173 if (UseAdd && LHS->hasOneUse() && isValueAvailable(LHS)) in emitAddSub()
1192 ResultReg = emitAddSub_ri(!UseAdd, RetVT, LHSReg, -Imm, SetFlags, in emitAddSub()
1195 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, Imm, SetFlags, in emitAddSub()
1199 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, 0, SetFlags, WantResult); in emitAddSub()
1213 return emitAddSub_rx(UseAdd, RetVT, LHSReg, RHSReg, ExtendType, in emitAddSub()
1219 return emitAddSub_rx(UseAdd, RetVT, LHSReg, RHSReg, ExtendType, 0, in emitAddSub()
1238 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, RHSReg, AArch64_AM::LSL, in emitAddSub()
1261 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, RHSReg, ShiftType, in emitAddSub()
1277 return emitAddSub_rr(UseAdd, RetVT, LHSReg, RHSReg, SetFlags, WantResult); in emitAddSub()
1280 unsigned AArch64FastISel::emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg, in emitAddSub_rr() argument
1299 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rr()
1317 unsigned AArch64FastISel::emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg, in emitAddSub_ri() argument
1341 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_ri()
1362 unsigned AArch64FastISel::emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg, in emitAddSub_rs() argument
1385 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rs()
1404 unsigned AArch64FastISel::emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg, in emitAddSub_rx() argument
1426 unsigned Opc = OpcTable[SetFlags][UseAdd][Is64Bit]; in emitAddSub_rx()