122   Register DstReg = MI.getOperand(0).getReg();  in expandMOVImm()  local
127   if (DstReg == AArch64::XZR || DstReg == AArch64::WZR) {  in expandMOVImm()
158         .addReg(DstReg, RegState::Define |  in expandMOVImm()
166       Register DstReg = MI.getOperand(0).getReg();  in expandMOVImm()  local
169         .addReg(DstReg,  in expandMOVImm()
173         .addReg(DstReg)  in expandMOVImm()
447   Register DstReg = MI.getOperand(0).getReg();  in expand_DestructiveOp()  local
451     assert(DstReg != MI.getOperand(3).getReg());  in expand_DestructiveOp()
458     if (DstReg == MI.getOperand(3).getReg()) {  in expand_DestructiveOp()
474     if (DstReg == MI.getOperand(3).getReg()) {  in expand_DestructiveOp()
478     } else if (DstReg == MI.getOperand(4).getReg()) {  in expand_DestructiveOp()
497       DstReg != MI.getOperand(DOPIdx).getReg() ||  in expand_DestructiveOp()
506         DstReg != MI.getOperand(DOPIdx).getReg() ||  in expand_DestructiveOp()
562                .addReg(DstReg, RegState::Define)  in expand_DestructiveOp()
568   } else if (DstReg != MI.getOperand(DOPIdx).getReg()) {  in expand_DestructiveOp()
573                .addReg(DstReg, RegState::Define)  in expand_DestructiveOp()
582     .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead));  in expand_DestructiveOp()
875     Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
876     if (DstReg == MI.getOperand(3).getReg()) {  in expandMI()
885     } else if (DstReg == MI.getOperand(2).getReg()) {  in expandMI()
896       if (DstReg == MI.getOperand(1).getReg()) {  in expandMI()
908             .addReg(DstReg,  in expandMI()
917             .addReg(DstReg,  in expandMI()
998     Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
1005                                         TII->get(AArch64::LDRXl), DstReg);  in expandMI()
1021           BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg);  in expandMI()
1026         unsigned Reg32 = TRI->getSubReg(DstReg, AArch64::sub_32);  in expandMI()
1030                    .addReg(DstReg, RegState::Kill)  in expandMI()
1031                    .addReg(DstReg, DstFlags | RegState::Implicit);  in expandMI()
1033         Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
1036                    .addUse(DstReg, RegState::Kill);  in expandMI()
1075       Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
1077           BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)  in expandMI()
1080                           TII->get(AArch64::LDRXui), DstReg)  in expandMI()
1081                       .addUse(DstReg)  in expandMI()
1096     Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
1097     assert(DstReg != AArch64::XZR);  in expandMI()
1099         BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg)  in expandMI()
1113       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi), DstReg)  in expandMI()
1114           .addReg(DstReg)  in expandMI()
1122             .addReg(DstReg)  in expandMI()
1141     Register DstReg = MI.getOperand(0).getReg();  in expandMI()  local
1150     BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MRS), DstReg)  in expandMI()