66   MachineRegisterInfo *MRI;  member in __anon133f2b0c0111::AArch64AdvSIMDScalar
105                     const MachineRegisterInfo *MRI) {  in isGPR64()  argument
109     return MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::GPR64RegClass);  in isGPR64()
114                     const MachineRegisterInfo *MRI) {  in isFPR64()  argument
116     return (MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::FPR64RegClass) &&  in isFPR64()
118            (MRI->getRegClass(Reg)->hasSuperClassEq(&AArch64::FPR128RegClass) &&  in isFPR64()
128                                       const MachineRegisterInfo *MRI,  in getSrcFromCopy()  argument
145                 MRI) &&  in getSrcFromCopy()
146         isGPR64(MI->getOperand(1).getReg(), MI->getOperand(1).getSubReg(), MRI))  in getSrcFromCopy()
149                 MRI) &&  in getSrcFromCopy()
151                 MRI)) {  in getSrcFromCopy()
208   if (!MRI->def_empty(OrigSrc0)) {  in isProfitableToTransform()
210         MRI->def_instr_begin(OrigSrc0);  in isProfitableToTransform()
211     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");  in isProfitableToTransform()
212     MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0);  in isProfitableToTransform()
218     if (MOSrc0 && MRI->hasOneNonDBGUse(OrigSrc0))  in isProfitableToTransform()
221   if (!MRI->def_empty(OrigSrc1)) {  in isProfitableToTransform()
223         MRI->def_instr_begin(OrigSrc1);  in isProfitableToTransform()
224     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");  in isProfitableToTransform()
225     MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1);  in isProfitableToTransform()
230     if (MOSrc1 && MRI->hasOneNonDBGUse(OrigSrc1))  in isProfitableToTransform()
242            Use = MRI->use_instr_nodbg_begin(Dst),  in isProfitableToTransform()
243            E = MRI->use_instr_nodbg_end();  in isProfitableToTransform()
246     if (getSrcFromCopy(&*Use, MRI, SubReg) || isTransformable(*Use))  in isProfitableToTransform()
301   if (!MRI->def_empty(OrigSrc0)) {  in transformInstruction()
303         MRI->def_instr_begin(OrigSrc0);  in transformInstruction()
304     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");  in transformInstruction()
305     MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0);  in transformInstruction()
313       if (MRI->hasOneNonDBGUse(OrigSrc0)) {  in transformInstruction()
320   if (!MRI->def_empty(OrigSrc1)) {  in transformInstruction()
322         MRI->def_instr_begin(OrigSrc1);  in transformInstruction()
323     assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!");  in transformInstruction()
324     MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1);  in transformInstruction()
332       if (MRI->hasOneNonDBGUse(OrigSrc1)) {  in transformInstruction()
343     Src0 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);  in transformInstruction()
349     Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass);  in transformInstruction()
357   Register Dst = MRI->createVirtualRegister(&AArch64::FPR64RegClass);  in transformInstruction()
397   MRI = &mf.getRegInfo();  in runOnMachineFunction()