Lines Matching refs:FloatRegs
717 FloatRegs, in tryARM64PackedUnwind() enumerator
757 Location = FloatRegs; in tryARM64PackedUnwind()
788 Location = FloatRegs; in tryARM64PackedUnwind()
796 Location = FloatRegs; in tryARM64PackedUnwind()
803 if (Location != FloatRegs || RegF == 0 || Inst.Register != 8 + RegF || in tryARM64PackedUnwind()
814 Location = FloatRegs; in tryARM64PackedUnwind()
817 if ((Location != IntRegs && Location != FloatRegs) || in tryARM64PackedUnwind()
822 Location = FloatRegs; in tryARM64PackedUnwind()
827 else if (Location == FloatRegs) in tryARM64PackedUnwind()
833 if (Location != IntRegs && Location != FloatRegs && Location != InputArgs) in tryARM64PackedUnwind()
840 if (Location != Start2 && Location != IntRegs && Location != FloatRegs && in tryARM64PackedUnwind()
856 if (Location != Start2 && Location != IntRegs && Location != FloatRegs && in tryARM64PackedUnwind()
1574 int FloatRegs = -1; // d8 - d(8+N) in tryARMPackedUnwind() local
1667 FloatRegs = Inst.Register - 8; in tryARMPackedUnwind()
1753 if (Homing && FloatRegs < 0 && IntRegs < 0 && StackAdjust == 0 && in tryARMPackedUnwind()
1786 if (FloatRegs != (int)(Inst.Register - 8)) in tryARMPackedUnwind()
1909 if (FloatRegs >= 0 && !GotFloatRegs) in tryARMPackedUnwind()
1938 assert(IntRegs < 0 || FloatRegs < 0); in tryARMPackedUnwind()
1944 } else if (FloatRegs >= 0) { in tryARMPackedUnwind()
1945 Reg = FloatRegs; in tryARMPackedUnwind()