Lines Matching refs:isKill
866 if (MOReg != Reg && (MO.isKill() || in rescheduleMIBelowKill()
918 bool isKill = in rescheduleMIBelowKill() local
919 MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)); in rescheduleMIBelowKill()
920 if (MOReg != Reg && ((isKill && regOverlapsSet(Uses, MOReg, TRI)) || in rescheduleMIBelowKill()
924 if (MOReg == Reg && !isKill) in rescheduleMIBelowKill()
1047 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI() local
1048 if (MOReg == Reg && !isKill) in rescheduleKillAboveMI()
1051 if (isKill && MOReg != Reg) in rescheduleKillAboveMI()
1090 !(MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)))) in rescheduleKillAboveMI()
1338 if (NewMIs[1]->getOperand(NewSrcIdx).isKill()) { in tryInstructionTransform()
1345 if (MO.isKill()) { in tryInstructionTransform()
1551 if (MO.isKill()) { in processTiedPairs()
1572 if (MO.isKill()) { in processTiedPairs()
1674 if (MI->getOperand(SrcIdx).isKill()) in processStatepoint()
1884 bool isKill = UseMO.isKill(); in eliminateRegSequence() local
1885 if (isKill) in eliminateRegSequence()
1890 isKill = false; in eliminateRegSequence()
1910 if (LV && isKill && !SrcReg.isPhysical()) in eliminateRegSequence()