Lines Matching refs:LIS
96 LiveIntervals *LIS; member in __anon568a009d0111::TwoAddressInstructionPass
201 static bool isPlainlyKilled(MachineInstr *MI, Register Reg, LiveIntervals *LIS);
291 LiveIntervals *LIS) { in isPlainlyKilled() argument
292 if (LIS && Reg.isVirtual() && !LIS->isNotInMIMap(*MI)) { in isPlainlyKilled()
299 LiveInterval &LI = LIS->getInterval(Reg); in isPlainlyKilled()
305 SlotIndex useIdx = LIS->getInstructionIndex(*MI); in isPlainlyKilled()
333 LiveIntervals *LIS, bool allowFalsePositives) { in isKilled() argument
339 if (!isPlainlyKilled(DefMI, Reg, LIS)) in isKilled()
381 LiveIntervals *LIS) { in findOnlyInterestingUse() argument
387 if (isPlainlyKilled(MI, Reg, LIS)) in findOnlyInterestingUse()
552 if (!isPlainlyKilled(MI, RegC, LIS)) in isProfitableToCommute()
683 MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS); in convertInstTo3Addr()
730 NewReg, IsDstPhys, LIS)) { in scanUses()
807 if (!LV && !LIS) in rescheduleMIBelowKill()
817 if (LIS) { in rescheduleMIBelowKill()
818 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleMIBelowKill()
822 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in rescheduleMIBelowKill()
828 KillMI = LIS->getInstructionFromIndex(I->end); in rescheduleMIBelowKill()
867 (LIS && isPlainlyKilled(MI, MOReg, LIS)))) in rescheduleMIBelowKill()
919 MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)); in rescheduleMIBelowKill()
940 if (LIS) { in rescheduleMIBelowKill()
947 LIS->handleMove(*CopyMI); in rescheduleMIBelowKill()
958 if (LIS) { in rescheduleMIBelowKill()
959 LIS->handleMove(*MI); in rescheduleMIBelowKill()
997 if (!LV && !LIS) in rescheduleKillAboveMI()
1007 if (LIS) { in rescheduleKillAboveMI()
1008 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleKillAboveMI()
1012 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); in rescheduleKillAboveMI()
1018 KillMI = LIS->getInstructionFromIndex(I->end); in rescheduleKillAboveMI()
1047 bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS)); in rescheduleKillAboveMI()
1090 !(MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS)))) in rescheduleKillAboveMI()
1123 if (LIS) { in rescheduleKillAboveMI()
1124 LIS->handleMove(*KillMI); in rescheduleKillAboveMI()
1173 bool OtherOpKilled = isKilled(*MI, OtherOpReg, MRI, TII, LIS, false); in tryInstructionCommute()
1224 bool regBKilled = isKilled(MI, regB, MRI, TII, LIS, true); in tryInstructionTransform()
1256 regBKilled = isKilled(MI, regB, MRI, TII, LIS, true); in tryInstructionTransform()
1369 if (LIS) { in tryInstructionTransform()
1375 LIS->RemoveMachineInstrFromMaps(MI); in tryInstructionTransform()
1382 if (LIS) { in tryInstructionTransform()
1385 LIS->repairIntervalsInRange(MBB, Begin, End, OrigRegs); in tryInstructionTransform()
1522 if (LIS) { in processTiedPairs()
1523 LastCopyIdx = LIS->InsertMachineInstrInMaps(*PrevMI).getRegSlot(); in processTiedPairs()
1526 LIS->getInstructionIndex(*MI).getRegSlot(IsEarlyClobber); in processTiedPairs()
1528 LiveInterval &LI = LIS->getInterval(RegA); in processTiedPairs()
1529 VNInfo *VNI = LI.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1532 VNI = S.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1537 if (LiveRange *LR = LIS->getCachedRegUnit(*Unit)) { in processTiedPairs()
1539 LR->getNextValue(LastCopyIdx, LIS->getVNInfoAllocator()); in processTiedPairs()
1596 if (LIS) { in processTiedPairs()
1597 SlotIndex UseIdx = LIS->getInstructionIndex(*MI); in processTiedPairs()
1610 LiveInterval &LI = LIS->getInterval(RegB); in processTiedPairs()
1662 if (LIS) { in processStatepoint()
1663 VNInfo::Allocator &A = LIS->getVNInfoAllocator(); in processStatepoint()
1664 LiveInterval &LI = LIS->getInterval(RegB); in processStatepoint()
1665 for (auto &S : LIS->getInterval(RegA)) { in processStatepoint()
1670 LIS->removeInterval(RegA); in processStatepoint()
1695 LIS = getAnalysisIfAvailable<LiveIntervals>(); in runOnMachineFunction()
1807 if (LIS) { in runOnMachineFunction()
1809 LiveInterval &LI = LIS->getInterval(Reg); in runOnMachineFunction()
1815 SlotIndex Idx = LIS->getInstructionIndex(*mi); in runOnMachineFunction()
1825 LIS->shrinkToUses(&LI); in runOnMachineFunction()
1829 LIS->removeInterval(Reg); in runOnMachineFunction()
1830 LIS->createAndComputeVirtRegInterval(Reg); in runOnMachineFunction()
1867 if (LIS) { in eliminateRegSequence()
1925 if (LIS) in eliminateRegSequence()
1926 LIS->RemoveMachineInstrFromMaps(MI); in eliminateRegSequence()
1933 if (LIS) in eliminateRegSequence()
1934 LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs); in eliminateRegSequence()