195 TargetRegisterInfo::getAllocatableClass(const TargetRegisterClass *RC) const {  in getAllocatableClass()
196   if (!RC || RC->isAllocatable())  in getAllocatableClass()
197     return RC;  in getAllocatableClass()
199   for (BitMaskClassIterator It(RC->getSubClassMask(), *this); It.isValid();  in getAllocatableClass()
219   for (const TargetRegisterClass* RC : regclasses()) {  in getMinimalPhysRegClass()  local
220     if ((VT == MVT::Other || isTypeLegalForClass(*RC, VT)) &&  in getMinimalPhysRegClass()
221         RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC)))  in getMinimalPhysRegClass()
222       BestRC = RC;  in getMinimalPhysRegClass()
237   for (const TargetRegisterClass *RC : regclasses()) {  in getMinimalPhysRegClassLLT()  local
238     if ((!Ty.isValid() || isTypeLegalForClass(*RC, Ty)) && RC->contains(reg) &&  in getMinimalPhysRegClassLLT()
239         (!BestRC || BestRC->hasSubClass(RC)))  in getMinimalPhysRegClassLLT()
240       BestRC = RC;  in getMinimalPhysRegClassLLT()
249                                    const TargetRegisterClass *RC, BitVector &R){  in getAllocatableSetForRC()  argument
250   assert(RC->isAllocatable() && "invalid for nonallocatable sets");  in getAllocatableSetForRC()
251   ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF);  in getAllocatableSetForRC()
257                                           const TargetRegisterClass *RC) const {  in getAllocatableSet()
259   if (RC) {  in getAllocatableSet()
261     const TargetRegisterClass *SubClass = getAllocatableClass(RC);  in getAllocatableSet()
353       const TargetRegisterClass *RC =  in getCommonSuperRegClass()  local
355       if (!RC || getRegSizeInBits(*RC) < MinSize)  in getCommonSuperRegClass()
364       if (BestRC && getRegSizeInBits(*RC) >= getRegSizeInBits(*BestRC))  in getCommonSuperRegClass()
368       BestRC = RC;  in getCommonSuperRegClass()
504   const TargetRegisterClass *RC{};  in getRegSizeInBits()  local
509     RC = getMinimalPhysRegClass(Reg);  in getRegSizeInBits()
518     RC = MRI.getRegClass(Reg);  in getRegSizeInBits()
520   assert(RC && "Unable to deduce the register class");  in getRegSizeInBits()
521   return getRegSizeInBits(*RC);  in getRegSizeInBits()
525     const MachineRegisterInfo &MRI, const TargetRegisterClass *RC,  in getCoveringSubRegIndexes()  argument
533     if (getSubClassWithSubReg(RC, Idx) != RC)  in getCoveringSubRegIndexes()