Lines Matching refs:VT
216 RTLIB::Libcall RTLIB::getFPLibCall(EVT VT, in getFPLibCall() argument
223 VT == MVT::f32 ? Call_F32 : in getFPLibCall()
224 VT == MVT::f64 ? Call_F64 : in getFPLibCall()
225 VT == MVT::f80 ? Call_F80 : in getFPLibCall()
226 VT == MVT::f128 ? Call_F128 : in getFPLibCall()
227 VT == MVT::ppcf128 ? Call_PPCF128 : in getFPLibCall()
502 MVT VT) { in getOUTLINE_ATOMIC() argument
504 switch (VT.SimpleTy) { in getOUTLINE_ATOMIC()
578 RTLIB::Libcall RTLIB::getSYNC(unsigned Opc, MVT VT) { in getSYNC() argument
581 switch (VT.SimpleTy) { \ in getSYNC()
751 for (MVT VT : {MVT::i2, MVT::i4}) in initActions()
752 OpActions[(unsigned)VT.SimpleTy][NT] = Expand; in initActions()
755 for (MVT VT : {MVT::i2, MVT::i4, MVT::v128i2, MVT::v64i4}) { in initActions()
756 setTruncStoreAction(AVT, VT, Expand); in initActions()
757 setLoadExtAction(ISD::EXTLOAD, AVT, VT, Expand); in initActions()
758 setLoadExtAction(ISD::ZEXTLOAD, AVT, VT, Expand); in initActions()
763 for (MVT VT : {MVT::i2, MVT::i4}) { in initActions()
764 setIndexedLoadAction(IM, VT, Expand); in initActions()
765 setIndexedStoreAction(IM, VT, Expand); in initActions()
766 setIndexedMaskedLoadAction(IM, VT, Expand); in initActions()
767 setIndexedMaskedStoreAction(IM, VT, Expand); in initActions()
771 for (MVT VT : MVT::fp_valuetypes()) { in initActions() local
772 MVT IntVT = MVT::getIntegerVT(VT.getFixedSizeInBits()); in initActions()
774 setOperationAction(ISD::ATOMIC_SWAP, VT, Promote); in initActions()
775 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
780 for (MVT VT : MVT::all_valuetypes()) { in initActions() local
784 setIndexedLoadAction(IM, VT, Expand); in initActions()
785 setIndexedStoreAction(IM, VT, Expand); in initActions()
786 setIndexedMaskedLoadAction(IM, VT, Expand); in initActions()
787 setIndexedMaskedStoreAction(IM, VT, Expand); in initActions()
791 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Expand); in initActions()
811 VT, Expand); in initActions()
816 VT, Expand); in initActions()
821 VT, Expand); in initActions()
824 setOperationAction({ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}, VT, in initActions()
829 {ISD::AVGFLOORS, ISD::AVGFLOORU, ISD::AVGCEILS, ISD::AVGCEILU}, VT, in initActions()
833 setOperationAction({ISD::ABDS, ISD::ABDU}, VT, Expand); in initActions()
836 setOperationAction({ISD::CTLZ_ZERO_UNDEF, ISD::CTTZ_ZERO_UNDEF}, VT, in initActions()
839 setOperationAction({ISD::BITREVERSE, ISD::PARITY}, VT, Expand); in initActions()
842 setOperationAction({ISD::FROUND, ISD::FROUNDEVEN, ISD::FPOWI}, VT, Expand); in initActions()
845 if (VT.isVector()) in initActions()
850 VT, Expand); in initActions()
854 setOperationAction(ISD::STRICT_##DAGN, VT, Expand); in initActions()
858 setOperationAction(ISD::GET_DYNAMIC_AREA_OFFSET, VT, Expand); in initActions()
867 VT, Expand); in initActions()
870 setOperationAction(ISD::VECTOR_SPLICE, VT, Expand); in initActions()
924 bool TargetLoweringBase::canOpTrap(unsigned Op, EVT VT) const { in canOpTrap()
925 assert(isTypeLegal(VT)); in canOpTrap()
949 TargetLoweringBase::getTypeConversion(LLVMContext &Context, EVT VT) const { in getTypeConversion()
951 if (VT.isSimple()) { in getTypeConversion()
952 MVT SVT = VT.getSimpleVT(); in getTypeConversion()
971 if (!VT.isVector()) { in getTypeConversion()
972 assert(VT.isInteger() && "Float types must be simple"); in getTypeConversion()
973 unsigned BitSize = VT.getSizeInBits(); in getTypeConversion()
976 EVT NVT = VT.getRoundIntegerType(Context); in getTypeConversion()
977 assert(NVT != VT && "Unable to round integer VT"); in getTypeConversion()
987 EVT::getIntegerVT(Context, VT.getSizeInBits() / 2)); in getTypeConversion()
991 ElementCount NumElts = VT.getVectorElementCount(); in getTypeConversion()
992 EVT EltVT = VT.getVectorElementType(); in getTypeConversion()
1004 if (!VT.isPow2VectorType()) { in getTypeConversion()
1016 if (VT.getVectorElementCount().isScalable()) in getTypeConversion()
1019 VT.getHalfNumVectorElementsVT(Context)); in getTypeConversion()
1074 if (!VT.isPow2VectorType()) { in getTypeConversion()
1075 EVT NVT = VT.getPow2VectorType(Context); in getTypeConversion()
1079 if (VT.getVectorElementCount() == ElementCount::getScalable(1)) in getTypeConversion()
1084 VT.getVectorElementCount().divideCoefficientBy(2)); in getTypeConversion()
1088 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, in getVectorTypeBreakdownMVT() argument
1093 ElementCount EC = VT.getVectorElementCount(); in getVectorTypeBreakdownMVT()
1094 MVT EltTy = VT.getVectorElementType(); in getVectorTypeBreakdownMVT()
1100 if (VT.isScalableVector() && !isPowerOf2_32(EC.getKnownMinValue())) in getVectorTypeBreakdownMVT()
1251 MVT VT) const { in findRepresentativeClass()
1252 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy]; in findRepresentativeClass()
1394 MVT VT = (MVT::SimpleValueType) i; in computeRegisterProperties() local
1395 if (isTypeLegal(VT)) in computeRegisterProperties()
1398 MVT EltVT = VT.getVectorElementType(); in computeRegisterProperties()
1399 ElementCount EC = VT.getVectorElementCount(); in computeRegisterProperties()
1401 bool IsScalable = VT.isScalableVector(); in computeRegisterProperties()
1402 LegalizeTypeAction PreferredAction = getPreferredVectorAction(VT); in computeRegisterProperties()
1420 ValueTypeActions.setTypeAction(VT, TypePromoteInteger); in computeRegisterProperties()
1443 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1452 MVT NVT = VT.getPow2VectorType(); in computeRegisterProperties()
1455 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1468 unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT, in computeRegisterProperties()
1475 MVT NVT = VT.getPow2VectorType(); in computeRegisterProperties()
1476 if (NVT == VT) { in computeRegisterProperties()
1480 ValueTypeActions.setTypeAction(VT, TypeScalarizeVector); in computeRegisterProperties()
1482 ValueTypeActions.setTypeAction(VT, TypeSplitVector); in computeRegisterProperties()
1484 ValueTypeActions.setTypeAction(VT, TypeSplitVector); in computeRegisterProperties()
1486 ValueTypeActions.setTypeAction(VT, EC.isScalable() in computeRegisterProperties()
1491 ValueTypeActions.setTypeAction(VT, TypeWidenVector); in computeRegisterProperties()
1515 EVT VT) const { in getSetCCResultType()
1516 assert(!VT.isVector() && "No default SetCC type for vectors!"); in getSetCCResultType()
1533 EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdown() argument
1536 ElementCount EltCnt = VT.getVectorElementCount(); in getVectorTypeBreakdown()
1543 LegalizeTypeAction TA = getTypeAction(Context, VT); in getVectorTypeBreakdown()
1546 EVT RegisterEVT = getTypeToTransformTo(Context, VT); in getVectorTypeBreakdown()
1556 EVT EltTy = VT.getVectorElementType(); in getVectorTypeBreakdown()
1564 EVT PartVT = VT; in getVectorTypeBreakdown()
1577 divideCeil(VT.getVectorElementCount().getKnownMinValue(), in getVectorTypeBreakdown()
1663 EVT VT = ValueVTs[j]; in GetReturnInfo() local
1675 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) { in GetReturnInfo()
1677 if (VT.bitsLT(MinVT)) in GetReturnInfo()
1678 VT = MinVT; in GetReturnInfo()
1682 TLI.getNumRegistersForCallingConv(ReturnType->getContext(), CC, VT); in GetReturnInfo()
1684 TLI.getRegisterTypeForCallingConv(ReturnType->getContext(), CC, VT); in GetReturnInfo()
1698 Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, /*isfixed=*/true, 0, 0)); in GetReturnInfo()
1711 LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace, in allowsMemoryAccessForAlignment() argument
1718 Type *Ty = VT.getTypeForEVT(Context); in allowsMemoryAccessForAlignment()
1719 if (VT.isZeroSized() || Alignment >= DL.getABITypeAlign(Ty)) { in allowsMemoryAccessForAlignment()
1727 return allowsMisalignedMemoryAccesses(VT, AddrSpace, Alignment, Flags, Fast); in allowsMemoryAccessForAlignment()
1731 LLVMContext &Context, const DataLayout &DL, EVT VT, in allowsMemoryAccessForAlignment() argument
1733 return allowsMemoryAccessForAlignment(Context, DL, VT, MMO.getAddrSpace(), in allowsMemoryAccessForAlignment()
1738 const DataLayout &DL, EVT VT, in allowsMemoryAccess() argument
1742 return allowsMemoryAccessForAlignment(Context, DL, VT, AddrSpace, Alignment, in allowsMemoryAccess()
1747 const DataLayout &DL, EVT VT, in allowsMemoryAccess() argument
1750 return allowsMemoryAccess(Context, DL, VT, MMO.getAddrSpace(), MMO.getAlign(), in allowsMemoryAccess()
1758 EVT VT = getApproximateEVTForLLT(Ty, DL, Context); in allowsMemoryAccess() local
1759 return allowsMemoryAccess(Context, DL, VT, MMO.getAddrSpace(), MMO.getAlign(), in allowsMemoryAccess()
1862 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64; in getTypeLegalizationCost() local
1863 return std::make_pair(InstructionCost::getInvalid(), VT); in getTypeLegalizationCost()
2063 static std::string getReciprocalOpName(bool IsSqrt, EVT VT) { in getReciprocalOpName() argument
2064 std::string Name = VT.isVector() ? "vec-" : ""; in getReciprocalOpName()
2069 if (VT.getScalarType() == MVT::f64) { in getReciprocalOpName()
2071 } else if (VT.getScalarType() == MVT::f16) { in getReciprocalOpName()
2074 assert(VT.getScalarType() == MVT::f32 && in getReciprocalOpName()
2108 static int getOpEnabled(bool IsSqrt, EVT VT, StringRef Override) { in getOpEnabled() argument
2141 std::string VTName = getReciprocalOpName(IsSqrt, VT); in getOpEnabled()
2168 static int getOpRefinementSteps(bool IsSqrt, EVT VT, StringRef Override) { in getOpRefinementSteps() argument
2196 std::string VTName = getReciprocalOpName(IsSqrt, VT); in getOpRefinementSteps()
2214 int TargetLoweringBase::getRecipEstimateSqrtEnabled(EVT VT, in getRecipEstimateSqrtEnabled() argument
2216 return getOpEnabled(true, VT, getRecipEstimateForFunc(MF)); in getRecipEstimateSqrtEnabled()
2219 int TargetLoweringBase::getRecipEstimateDivEnabled(EVT VT, in getRecipEstimateDivEnabled() argument
2221 return getOpEnabled(false, VT, getRecipEstimateForFunc(MF)); in getRecipEstimateDivEnabled()
2224 int TargetLoweringBase::getSqrtRefinementSteps(EVT VT, in getSqrtRefinementSteps() argument
2226 return getOpRefinementSteps(true, VT, getRecipEstimateForFunc(MF)); in getSqrtRefinementSteps()
2229 int TargetLoweringBase::getDivRefinementSteps(EVT VT, in getDivRefinementSteps() argument
2231 return getOpRefinementSteps(false, VT, getRecipEstimateForFunc(MF)); in getDivRefinementSteps()