42 TargetInstrInfo::~TargetInstrInfo() = default;
45 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum,  in getRegClass()
65 void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,  in insertNoop()
72 void TargetInstrInfo::insertNoops(MachineBasicBlock &MBB,  in insertNoops()
98 unsigned TargetInstrInfo::getInlineAsmLength(  in getInlineAsmLength()
139 TargetInstrInfo::ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail,  in ReplaceTailWithBranchTo()
165 MachineInstr *TargetInstrInfo::commuteInstructionImpl(MachineInstr &MI,  in commuteInstructionImpl()
248 MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr &MI, bool NewMI,  in commuteInstruction()
263 bool TargetInstrInfo::fixCommutedOpIndices(unsigned &ResultIdx1,  in fixCommutedOpIndices()
294 bool TargetInstrInfo::findCommutedOpIndices(const MachineInstr &MI,  in findCommutedOpIndices()
318 bool TargetInstrInfo::isUnpredicatedTerminator(const MachineInstr &MI) const {  in isUnpredicatedTerminator()
329 bool TargetInstrInfo::PredicateInstruction(  in PredicateInstruction()
359 bool TargetInstrInfo::hasLoadFromStackSlot(  in hasLoadFromStackSlot()
373 bool TargetInstrInfo::hasStoreToStackSlot(  in hasStoreToStackSlot()
387 bool TargetInstrInfo::getStackSlotRange(const TargetRegisterClass *RC,  in getStackSlotRange()
417 void TargetInstrInfo::reMaterialize(MachineBasicBlock &MBB,  in reMaterialize()
427 bool TargetInstrInfo::produceSameValue(const MachineInstr &MI0,  in produceSameValue()
433 MachineInstr &TargetInstrInfo::duplicate(MachineBasicBlock &MBB,  in duplicate()
473 MCInst TargetInstrInfo::getNop() const { llvm_unreachable("Not implemented"); }  in getNop()
476 TargetInstrInfo::getPatchpointUnfoldableRange(const MachineInstr &MI) const {  in getPatchpointUnfoldableRange()
495                                     const TargetInstrInfo &TII) {  in foldPatchpoint()
558 MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineInstr &MI,  in foldMemoryOperand()
650 MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineInstr &MI,  in foldMemoryOperand()
698 bool TargetInstrInfo::hasReassociableOperands(  in hasReassociableOperands()
717 bool TargetInstrInfo::hasReassociableSibling(const MachineInstr &Inst,  in hasReassociableSibling()
747 bool TargetInstrInfo::isReassociationCandidate(const MachineInstr &Inst,  in isReassociationCandidate()
775 bool TargetInstrInfo::getMachineCombinerPatterns(  in getMachineCombinerPatterns()
799 TargetInstrInfo::isThroughputPattern(MachineCombinerPattern Pattern) const {  in isThroughputPattern()
805 void TargetInstrInfo::reassociateOps(  in reassociateOps()
813   const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();  in reassociateOps()
891 void TargetInstrInfo::genAlternativeCodeSequence(  in genAlternativeCodeSequence()
918 bool TargetInstrInfo::isReallyTriviallyReMaterializableGeneric(  in isReallyTriviallyReMaterializableGeneric()
997 int TargetInstrInfo::getSPAdjust(const MachineInstr &MI) const {  in getSPAdjust()
1021 bool TargetInstrInfo::isSchedulingBoundary(const MachineInstr &MI,  in isSchedulingBoundary()
1044 bool TargetInstrInfo::usePreRAHazardRecognizer() const {  in usePreRAHazardRecognizer()
1049 ScheduleHazardRecognizer *TargetInstrInfo::
1057 ScheduleHazardRecognizer *TargetInstrInfo::CreateTargetMIHazardRecognizer(  in CreateTargetMIHazardRecognizer()
1063 ScheduleHazardRecognizer *TargetInstrInfo::
1070 bool TargetInstrInfo::getMemOperandWithOffset(  in getMemOperandWithOffset()
1088 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
1104 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()
1119 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,  in getNumMicroOps()
1135 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel &SchedModel,  in defaultDefLatency()
1146 unsigned TargetInstrInfo::getPredicationCost(const MachineInstr &) const {  in getPredicationCost()
1150 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()
1161 bool TargetInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel,  in hasLowDefLatency()
1174 TargetInstrInfo::describeLoadedValue(const MachineInstr &MI,  in describeLoadedValue()
1256 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
1266 bool TargetInstrInfo::getRegSequenceInputs(  in getRegSequenceInputs()
1293 bool TargetInstrInfo::getExtractSubregInputs(  in getExtractSubregInputs()
1318 bool TargetInstrInfo::getInsertSubregInputs(  in getInsertSubregInputs()
1347 std::string TargetInstrInfo::createMIROperandComment(  in createMIROperandComment()
1402 TargetInstrInfo::PipelinerLoopInfo::~PipelinerLoopInfo() = default;
1404 void TargetInstrInfo::mergeOutliningCandidateAttributes(  in mergeOutliningCandidateAttributes()
1422 bool TargetInstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,  in isMBBSafeToOutlineFrom()