Lines Matching refs:OpenIdx
361 OpenIdx = 0; in reset()
642 OpenIdx = Edit->size(); in openIntv()
644 return OpenIdx; in openIntv()
650 LLVM_DEBUG(dbgs() << " selectIntv " << OpenIdx << " -> " << Idx << '\n'); in selectIntv()
651 OpenIdx = Idx; in selectIntv()
655 assert(OpenIdx && "openIntv not called before enterIntvBefore"); in enterIntvBefore()
667 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI); in enterIntvBefore()
672 assert(OpenIdx && "openIntv not called before enterIntvAfter"); in enterIntvAfter()
684 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), in enterIntvAfter()
690 assert(OpenIdx && "openIntv not called before enterIntvAtEnd"); in enterIntvAtEnd()
718 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB, in enterIntvAtEnd()
720 RegAssign.insert(VNI->def, End, OpenIdx); in enterIntvAtEnd()
731 assert(OpenIdx && "openIntv not called before useIntv"); in useIntv()
733 RegAssign.insert(Start, End, OpenIdx); in useIntv()
738 assert(OpenIdx && "openIntv not called before leaveIntvAfter"); in leaveIntvAfter()
769 assert(OpenIdx && "openIntv not called before leaveIntvBefore"); in leaveIntvBefore()
788 assert(OpenIdx && "openIntv not called before leaveIntvAtTop"); in leaveIntvAtTop()
801 RegAssign.insert(Start, VNI->def, OpenIdx); in leaveIntvAtTop()
813 assert(OpenIdx && "openIntv not called before overlapIntv"); in overlapIntv()
834 RegAssign.insert(Start, End, OpenIdx); in overlapIntv()