334     MVT RegisterVT;  in getCopyFromPartsVector()  local
341           NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
345                                      NumIntermediates, RegisterVT);  in getCopyFromPartsVector()
350     assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyFromPartsVector()
351     assert(RegisterVT.getSizeInBits() ==  in getCopyFromPartsVector()
701   MVT RegisterVT;  in getCopyToPartsVector()  local
707         NumIntermediates, RegisterVT);  in getCopyToPartsVector()
711                                    NumIntermediates, RegisterVT);  in getCopyToPartsVector()
716   assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");  in getCopyToPartsVector()
805     MVT RegisterVT =  in RegsForValue()  local
811     RegVTs.push_back(RegisterVT);  in RegsForValue()
834     MVT RegisterVT =  in getCopyFromRegs()  local
843         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);  in getCopyFromRegs()
845         P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);  in getCopyFromRegs()
855           !RegisterVT.isInteger())  in getCopyFromRegs()
863       unsigned RegSize = RegisterVT.getScalarSizeInBits();  in getCopyFromRegs()
871         Parts[i] = DAG.getConstant(0, dl, RegisterVT);  in getCopyFromRegs()
892                              RegisterVT, P, DAG.getValueType(FromVT));  in getCopyFromRegs()
896                                      RegisterVT, ValueVT, V, CallConv);  in getCopyFromRegs()
917     MVT RegisterVT =  in getCopyToRegs()  local
922     if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))  in getCopyToRegs()
926                    NumParts, RegisterVT, V, CallConv, ExtendKind);  in getCopyToRegs()
1002     MVT RegisterVT = RegVTs[Value];  in AddInlineAsmOperands()  local
1004                                            RegisterVT);  in AddInlineAsmOperands()
1008       Ops.push_back(DAG.getRegister(TheReg, RegisterVT));  in AddInlineAsmOperands()
1019     MVT RegisterVT = std::get<1>(CountAndVT);  in getRegsAndSizes()  local
1020     TypeSize RegisterSize = RegisterVT.getSizeInBits();  in getRegsAndSizes()
9647       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);  in LowerCallTo()  local
9649       unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;  in LowerCallTo()
9650       RetTys.append(NumRegs, RegisterVT);  in LowerCallTo()
9713       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
9720         MyFlags.VT = RegisterVT;  in LowerCallTo()
9997       MVT RegisterVT = getRegisterTypeForCallingConv(CLI.RetTy->getContext(),  in LowerCallTo()  local
10003                                               NumRegs, RegisterVT, VT, nullptr,  in LowerCallTo()
10290     MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVTs[0]);  in LowerArguments()  local
10291     ISD::InputArg RetArg(Flags, RegisterVT, ValueVTs[0], true,  in LowerArguments()
10420       MVT RegisterVT = TLI->getRegisterTypeForCallingConv(  in LowerArguments()  local
10428         ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,  in LowerArguments()
10429                  ArgNo, PartBase+i*RegisterVT.getStoreSize().getKnownMinSize());  in LowerArguments()