225   void AddPredQueued(SUnit *SU, const SDep &D) {  in AddPredQueued()
233   void AddPred(SUnit *SU, const SDep &D) {  in AddPred()
241   void RemovePred(SUnit *SU, const SDep &D) {  in RemovePred()
252   void ReleasePred(SUnit *SU, const SDep *PredEdge);
259   void CapturePred(SDep *PredEdge);
398 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) {  in ReleasePred()
556   for (SDep &Pred : SU->Preds) {  in ReleasePredecessors()
770   for (SDep &Succ : SU->Succs) {  in ScheduleNodeBottomUp()
820 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) {  in CapturePred()
839   for (SDep &Pred : SU->Preds) {  in UnscheduleNodeBottomUp()
1057   SmallVector<SDep, 4> ChainPreds;  in TryUnfoldSU()
1058   SmallVector<SDep, 4> ChainSuccs;  in TryUnfoldSU()
1059   SmallVector<SDep, 4> LoadPreds;  in TryUnfoldSU()
1060   SmallVector<SDep, 4> NodePreds;  in TryUnfoldSU()
1061   SmallVector<SDep, 4> NodeSuccs;  in TryUnfoldSU()
1062   for (SDep &Pred : SU->Preds) {  in TryUnfoldSU()
1070   for (SDep &Succ : SU->Succs) {  in TryUnfoldSU()
1078   for (const SDep &Pred : ChainPreds) {  in TryUnfoldSU()
1083   for (const SDep &Pred : LoadPreds) {  in TryUnfoldSU()
1088   for (const SDep &Pred : NodePreds) {  in TryUnfoldSU()
1092   for (SDep D : NodeSuccs) {  in TryUnfoldSU()
1103   for (SDep D : ChainSuccs) {  in TryUnfoldSU()
1115   SDep D(LoadSU, SDep::Data, 0);  in TryUnfoldSU()
1187   for (SDep &Pred : SU->Preds)  in CopyAndMoveSuccessors()
1193   AddPredQueued(NewSU, SDep(SU, SDep::Artificial));  in CopyAndMoveSuccessors()
1197   SmallVector<std::pair<SUnit *, SDep>, 4> DelDeps;  in CopyAndMoveSuccessors()
1198   for (SDep &Succ : SU->Succs) {  in CopyAndMoveSuccessors()
1203       SDep D = Succ;  in CopyAndMoveSuccessors()
1236   SmallVector<std::pair<SUnit *, SDep>, 4> DelDeps;  in InsertCopiesAndMoveSuccs()
1237   for (SDep &Succ : SU->Succs) {  in InsertCopiesAndMoveSuccs()
1242       SDep D = Succ;  in InsertCopiesAndMoveSuccs()
1251       AddPredQueued(SuccSU, SDep(CopyFromSU, SDep::Artificial));  in InsertCopiesAndMoveSuccs()
1257   SDep FromDep(SU, SDep::Data, Reg);  in InsertCopiesAndMoveSuccs()
1260   SDep ToDep(CopyFromSU, SDep::Data, 0);  in InsertCopiesAndMoveSuccs()
1359   for (SDep &Pred : SU->Preds) {  in DelayForLiveRegsBottomUp()
1539       AddPredQueued(TrySU, SDep(BtSU, SDep::Artificial));  in PickNodeToScheduleBottomUp()
1593       AddPredQueued(TrySU, SDep(Copies.front(), SDep::Artificial));  in PickNodeToScheduleBottomUp()
1600     AddPredQueued(NewDef, SDep(TrySU, SDep::Artificial));  in PickNodeToScheduleBottomUp()
2000     for (const SDep &Pred : TempSU->Preds) {  in CalcNodeSethiUllmanNumber()
2103   for (const SDep &Pred : SU->Preds) {  in HighRegPressure()
2152   for (const SDep &Pred : SU->Preds) {  in RegPressureDiff()
2195   for (const SDep &Pred : SU->Preds) {  in scheduledNode()
2277   for (const SDep &Pred : SU->Preds) {  in unscheduledNode()
2345   for (const SDep &Succ : SU->Succs) {  in closestSucc()
2363   for (const SDep &Pred : SU->Preds) {  in calcMaxScratches()
2374   for (const SDep &Pred : SU->Preds) {  in hasOnlyLiveInOpers()
2396   for (const SDep &Succ : SU->Succs) {  in hasOnlyLiveOutUses()
2433   for (const SDep &Pred : SU->Preds) {  in initVRegCycle()
2445   for (const SDep &Pred : SU->Preds) {  in resetVRegCycle()
2463   for (const SDep &Pred : SU->Preds) {  in hasVRegCycleUse()
2863   for (const SDep &Succ : SU->Succs) {  in canClobberReachingPhysRegUse()
2865     for (const SDep &SuccPred : SuccSU->Preds) {  in canClobberReachingPhysRegUse()
2976     for (const SDep &Pred : SU.Preds)  in PrescheduleNodesWithMultipleUses()
3000     for (const SDep &Pred : SU.Preds)  in PrescheduleNodesWithMultipleUses()
3023     for (const SDep &PredSucc : PredSU->Succs) {  in PrescheduleNodesWithMultipleUses()
3046       SDep Edge = PredSU->Succs[i];  in PrescheduleNodesWithMultipleUses()
3092       for (const SDep &Succ : DUSU->Succs) {  in AddPseudoTwoAddrDeps()
3136           scheduleDAG->AddPredQueued(&SU, SDep(SuccSU, SDep::Artificial));  in AddPseudoTwoAddrDeps()