399   SUnit *PredSU = PredEdge->getSUnit();  in ReleasePred()  local
402   if (PredSU->NumSuccsLeft == 0) {  in ReleasePred()
404     dumpNode(*PredSU);  in ReleasePred()
409   --PredSU->NumSuccsLeft;  in ReleasePred()
414     PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge->getLatency());  in ReleasePred()
419   if (PredSU->NumSuccsLeft == 0 && PredSU != &EntrySU) {  in ReleasePred()
420     PredSU->isAvailable = true;  in ReleasePred()
422     unsigned Height = PredSU->getHeight();  in ReleasePred()
426     if (isReady(PredSU)) {  in ReleasePred()
427       AvailableQueue->push(PredSU);  in ReleasePred()
431     else if (!PredSU->isPending) {  in ReleasePred()
432       PredSU->isPending = true;  in ReleasePred()
433       PendingQueue.push_back(PredSU);  in ReleasePred()
821   SUnit *PredSU = PredEdge->getSUnit();  in CapturePred()  local
822   if (PredSU->isAvailable) {  in CapturePred()
823     PredSU->isAvailable = false;  in CapturePred()
824     if (!PredSU->isPending)  in CapturePred()
825       AvailableQueue->remove(PredSU);  in CapturePred()
828   assert(PredSU->NumSuccsLeft < std::numeric_limits<unsigned>::max() &&  in CapturePred()
830   ++PredSU->NumSuccsLeft;  in CapturePred()
1979       SUnit *PredSU = Pred.getSUnit();  in CalcNodeSethiUllmanNumber()  local
1980       if (SUNumbers[PredSU->NodeNum] == 0) {  in CalcNodeSethiUllmanNumber()
1984           assert(It.SU != PredSU && "Trying to push an element twice?");  in CalcNodeSethiUllmanNumber()
1988         WorkList.push_back(PredSU);  in CalcNodeSethiUllmanNumber()
2002       SUnit *PredSU = Pred.getSUnit();  in CalcNodeSethiUllmanNumber()  local
2003       unsigned PredSethiUllman = SUNumbers[PredSU->NodeNum];  in CalcNodeSethiUllmanNumber()
2106     SUnit *PredSU = Pred.getSUnit();  in HighRegPressure()  local
2109     if (PredSU->NumRegDefsLeft == 0) {  in HighRegPressure()
2112     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in HighRegPressure()
2155     SUnit *PredSU = Pred.getSUnit();  in RegPressureDiff()  local
2158     if (PredSU->NumRegDefsLeft == 0) {  in RegPressureDiff()
2159       if (PredSU->getNode()->isMachineOpcode())  in RegPressureDiff()
2163     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in RegPressureDiff()
2198     SUnit *PredSU = Pred.getSUnit();  in scheduledNode()  local
2201     if (PredSU->NumRegDefsLeft == 0) {  in scheduledNode()
2219     --PredSU->NumRegDefsLeft;  in scheduledNode()
2220     unsigned SkipRegDefs = PredSU->NumRegDefsLeft;  in scheduledNode()
2221     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in scheduledNode()
2280     SUnit *PredSU = Pred.getSUnit();  in unscheduledNode()  local
2283     if (PredSU->NumSuccsLeft != PredSU->Succs.size())  in unscheduledNode()
2285     const SDNode *PN = PredSU->getNode();  in unscheduledNode()
2376     const SUnit *PredSU = Pred.getSUnit();  in hasOnlyLiveInOpers()  local
2377     if (PredSU->getNode() &&  in hasOnlyLiveInOpers()
2378         PredSU->getNode()->getOpcode() == ISD::CopyFromReg) {  in hasOnlyLiveInOpers()
2380         cast<RegisterSDNode>(PredSU->getNode()->getOperand(1))->getReg();  in hasOnlyLiveInOpers()
2447     SUnit *PredSU = Pred.getSUnit();  in resetVRegCycle()  local
2448     if (PredSU->isVRegCycle) {  in resetVRegCycle()
2449       assert(PredSU->getNode()->getOpcode() == ISD::CopyFromReg &&  in resetVRegCycle()
2999     SUnit *PredSU = nullptr;  in PrescheduleNodesWithMultipleUses()  local
3002         PredSU = Pred.getSUnit();  in PrescheduleNodesWithMultipleUses()
3005     assert(PredSU);  in PrescheduleNodesWithMultipleUses()
3009     if (PredSU->hasPhysRegDefs)  in PrescheduleNodesWithMultipleUses()
3012     if (PredSU->NumSuccs == 1)  in PrescheduleNodesWithMultipleUses()
3023     for (const SDep &PredSucc : PredSU->Succs) {  in PrescheduleNodesWithMultipleUses()
3043                << PredSU->NodeNum  in PrescheduleNodesWithMultipleUses()
3045     for (unsigned i = 0; i != PredSU->Succs.size(); ++i) {  in PrescheduleNodesWithMultipleUses()
3046       SDep Edge = PredSU->Succs[i];  in PrescheduleNodesWithMultipleUses()
3050         Edge.setSUnit(PredSU);  in PrescheduleNodesWithMultipleUses()