Lines Matching refs:CurCycle
156 unsigned CurCycle = 0; member in __anon4c419b9e0111::ScheduleDAGRRList
358 CurCycle = 0; in Schedule()
630 if (NextCycle <= CurCycle) in AdvanceToCycle()
637 CurCycle = NextCycle; in AdvanceToCycle()
640 for (; CurCycle != NextCycle; ++CurCycle) { in AdvanceToCycle()
688 AdvanceToCycle(CurCycle + Stalls); in AdvancePastStalls()
737 LLVM_DEBUG(dbgs() << "\n*** Scheduling [" << CurCycle << "]: "); in ScheduleNodeBottomUp()
741 if (CurCycle < SU->getHeight()) in ScheduleNodeBottomUp()
750 SU->setHeightToAtLeast(CurCycle); in ScheduleNodeBottomUp()
763 AdvanceToCycle(CurCycle + 1); in ScheduleNodeBottomUp()
813 AdvanceToCycle(CurCycle + 1); in ScheduleNodeBottomUp()
953 CurCycle = OldSU->getHeight(); in BacktrackBottomUp()
955 AvailableQueue->setCurCycle(CurCycle); in BacktrackBottomUp()
1641 AdvanceToCycle(std::max(CurCycle + 1, MinAvailableCycle)); in ListScheduleBottomUp()
1658 bool isReady(SUnit* SU, unsigned CurCycle) const { return true; } in isReady()
1716 bool isReady(SUnit *SU, unsigned CurCycle) const;
1733 bool isReady(SUnit *SU, unsigned CurCycle) const;
2669 bool hybrid_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const { in isReady()
2674 if (SU->getHeight() > (CurCycle + ReadyDelay)) return false; in isReady()
2716 bool ilp_ls_rr_sort::isReady(SUnit *SU, unsigned CurCycle) const { in isReady()
2717 if (SU->getHeight() > CurCycle) return false; in isReady()