723   EVT SrcVT = LD->getMemoryVT();  in LegalizeLoadOps()  local
724   TypeSize SrcWidth = SrcVT.getSizeInBits();  in LegalizeLoadOps()
728   if (SrcWidth != SrcVT.getStoreSizeInBits() &&  in LegalizeLoadOps()
736       (SrcVT != MVT::i1 ||  in LegalizeLoadOps()
741     unsigned NewWidth = SrcVT.getStoreSizeInBits();  in LegalizeLoadOps()
761                            Result, DAG.getValueType(SrcVT));  in LegalizeLoadOps()
766                            DAG.getValueType(SrcVT));  in LegalizeLoadOps()
772     assert(!SrcVT.isVector() && "Unsupported extload!");  in LegalizeLoadOps()
849                                  SrcVT.getSimpleVT())) {  in LegalizeLoadOps()
877       if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) {  in LegalizeLoadOps()
880         EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT());  in LegalizeLoadOps()
881         if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT?  in LegalizeLoadOps()
882             TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) {  in LegalizeLoadOps()
886               (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType;  in LegalizeLoadOps()
889                                         SrcVT, LD->getMemOperand());  in LegalizeLoadOps()
891               ISD::getExtForLoadExtType(SrcVT.isFloatingPoint(), ExtType);  in LegalizeLoadOps()
901         if (SrcVT.getScalarType() == MVT::f16) {  in LegalizeLoadOps()
902           EVT ISrcVT = SrcVT.changeTypeToInteger();  in LegalizeLoadOps()
914       assert(!SrcVT.isVector() &&  in LegalizeLoadOps()
927                                       Chain, Ptr, SrcVT,  in LegalizeLoadOps()
933                              Result, DAG.getValueType(SrcVT));  in LegalizeLoadOps()
935         ValRes = DAG.getZeroExtendInReg(Result, dl, SrcVT);  in LegalizeLoadOps()
1739   EVT SrcVT = SrcOp.getValueType();  in EmitStackConvert()  local
1744   if ((SrcVT.bitsGT(SlotVT) &&  in EmitStackConvert()
1764   if (SrcVT.bitsGT(SlotVT))  in EmitStackConvert()
1768     assert(SrcVT.bitsEq(SlotVT) && "Invalid store");  in EmitStackConvert()
2327   EVT SrcVT = Op0.getValueType();  in ExpandLegalINT_TO_FP()  local
2331   if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) &&  in ExpandLegalINT_TO_FP()
2402   if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) ||  in ExpandLegalINT_TO_FP()
2403       (SrcVT == MVT::i64 && DestVT == MVT::f64)) {  in ExpandLegalINT_TO_FP()
2419     EVT SetCCVT = getSetCCResultType(SrcVT);  in ExpandLegalINT_TO_FP()
2422         dl, SetCCVT, Op0, DAG.getConstant(0, dl, SrcVT), ISD::SETLT);  in ExpandLegalINT_TO_FP()
2424     EVT ShiftVT = TLI.getShiftAmountTy(SrcVT, DAG.getDataLayout());  in ExpandLegalINT_TO_FP()
2426     SDValue Shr = DAG.getNode(ISD::SRL, dl, SrcVT, Op0, ShiftConst);  in ExpandLegalINT_TO_FP()
2427     SDValue AndConst = DAG.getConstant(1, dl, SrcVT);  in ExpandLegalINT_TO_FP()
2428     SDValue And = DAG.getNode(ISD::AND, dl, SrcVT, Op0, AndConst);  in ExpandLegalINT_TO_FP()
2429     SDValue Or = DAG.getNode(ISD::OR, dl, SrcVT, And, Shr);  in ExpandLegalINT_TO_FP()
2435       SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0);  in ExpandLegalINT_TO_FP()
2467              SrcVT.getSizeInBits() - 1 &&  in ExpandLegalINT_TO_FP()
2477   SDValue SignSet = DAG.getSetCC(dl, getSetCCResultType(SrcVT), Op0,  in ExpandLegalINT_TO_FP()
2478                                  DAG.getConstant(0, dl, SrcVT), ISD::SETLT);  in ExpandLegalINT_TO_FP()
2488   switch (SrcVT.getSimpleVT().SimpleTy) {  in ExpandLegalINT_TO_FP()