Lines Matching refs:RoundWidth
565 unsigned RoundWidth = 1 << LogStWidth; in LegalizeStoreOps() local
566 assert(RoundWidth < StWidthBits); in LegalizeStoreOps()
567 unsigned ExtraWidth = StWidthBits - RoundWidth; in LegalizeStoreOps()
568 assert(ExtraWidth < RoundWidth); in LegalizeStoreOps()
569 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeStoreOps()
571 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeStoreOps()
583 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
587 DAG.getConstant(RoundWidth, dl, in LegalizeStoreOps()
604 IncrementSize = RoundWidth / 8; in LegalizeStoreOps()
776 unsigned RoundWidth = 1 << LogSrcWidth; in LegalizeLoadOps() local
777 assert(RoundWidth < SrcWidthBits); in LegalizeLoadOps()
778 unsigned ExtraWidth = SrcWidthBits - RoundWidth; in LegalizeLoadOps()
779 assert(ExtraWidth < RoundWidth); in LegalizeLoadOps()
780 assert(!(RoundWidth % 8) && !(ExtraWidth % 8) && in LegalizeLoadOps()
782 EVT RoundVT = EVT::getIntegerVT(*DAG.getContext(), RoundWidth); in LegalizeLoadOps()
796 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()
810 DAG.getConstant(RoundWidth, dl, in LegalizeLoadOps()
824 IncrementSize = RoundWidth / 8; in LegalizeLoadOps()