Lines Matching refs:DestVT

157   SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
159 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
876 EVT DestVT = Node->getValueType(0); in LegalizeLoadOps() local
877 if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) { in LegalizeLoadOps()
903 EVT IDestVT = DestVT.changeTypeToInteger(); in LegalizeLoadOps()
908 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps()
1732 EVT DestVT, const SDLoc &dl) { in EmitStackConvert() argument
1733 return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode()); in EmitStackConvert()
1737 EVT DestVT, const SDLoc &dl, in EmitStackConvert() argument
1740 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
1746 (SlotVT.bitsLT(DestVT) && in EmitStackConvert()
1747 !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT))) in EmitStackConvert()
1773 if (SlotVT.bitsEq(DestVT)) in EmitStackConvert()
1774 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign); in EmitStackConvert()
1776 assert(SlotVT.bitsLT(DestVT) && "Unknown extension!"); in EmitStackConvert()
1777 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT, in EmitStackConvert()
2323 EVT DestVT = Node->getValueType(0); in ExpandLegalINT_TO_FP() local
2332 (DestVT.bitsLE(MVT::f64) || in ExpandLegalINT_TO_FP()
2335 DestVT))) { in ExpandLegalINT_TO_FP()
2382 if (DestVT != Sub.getValueType()) { in ExpandLegalINT_TO_FP()
2385 DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT); in ExpandLegalINT_TO_FP()
2393 Result = DAG.getFPExtendOrRound(Sub, dl, DestVT); in ExpandLegalINT_TO_FP()
2402 if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) || in ExpandLegalINT_TO_FP()
2403 (SrcVT == MVT::i64 && DestVT == MVT::f64)) { in ExpandLegalINT_TO_FP()
2436 Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2438 Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2450 SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or); in ExpandLegalINT_TO_FP()
2451 Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt); in ExpandLegalINT_TO_FP()
2452 Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2455 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP()
2460 Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT)) in ExpandLegalINT_TO_FP()
2466 assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >= in ExpandLegalINT_TO_FP()
2472 Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2475 Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP()
2507 if (DestVT == MVT::f32) in ExpandLegalINT_TO_FP()
2514 ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx, in ExpandLegalINT_TO_FP()
2523 SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other }, in ExpandLegalINT_TO_FP()
2529 return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg); in ExpandLegalINT_TO_FP()
2542 EVT DestVT = N->getValueType(0); in PromoteLegalINT_TO_FP() local
2578 DAG.getNode(OpToUse, dl, {DestVT, MVT::Other}, in PromoteLegalINT_TO_FP()
2588 DAG.getNode(OpToUse, dl, DestVT, in PromoteLegalINT_TO_FP()
2603 EVT DestVT = N->getValueType(0); in PromoteLegalFP_TO_INT() local
2606 EVT NewOutTy = DestVT; in PromoteLegalFP_TO_INT()
2639 SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation); in PromoteLegalFP_TO_INT()