Lines Matching refs:getSimpleVT

247   MVT VT = RealVT.getSimpleVT();  in getRegForValue()
251 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT(); in getRegForValue()
310 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, in materializeConstant()
393 IdxN = fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, IdxN); in getRegForGEPIndex()
396 fastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE, IdxN); in getRegForGEPIndex()
478 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, CI->getZExtValue(), in selectBinaryOp()
479 VT.getSimpleVT()); in selectBinaryOp()
510 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
511 VT.getSimpleVT()); in selectBinaryOp()
525 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp()
1399 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast()
1416 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast()
1417 MVT DstVT = DstEVT.getSimpleVT(); in selectBitCast()
1448 MVT Ty = ETy.getSimpleVT(); in selectFreeze()
1607 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg()
1622 Register IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg()
1628 IntVT.getSimpleVT(), ISD::XOR, IntReg, in selectFNeg()
1629 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); in selectFNeg()
1633 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
1652 MVT VT = RealVT.getSimpleVT(); in selectExtractValue()