Lines Matching refs:constrainOperandRegClass
1900 Register FastISel::constrainOperandRegClass(const MCInstrDesc &II, Register Op, in constrainOperandRegClass() function in FastISel
1931 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_r()
1952 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rr()
1953 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rr()
1975 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rrr()
1976 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rrr()
1977 Op2 = constrainOperandRegClass(II, Op2, II.getNumDefs() + 2); in fastEmitInst_rrr()
2001 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_ri()
2023 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rii()
2066 Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); in fastEmitInst_rri()
2067 Op1 = constrainOperandRegClass(II, Op1, II.getNumDefs() + 1); in fastEmitInst_rri()