51 void RegScavenger::setRegUsed(Register Reg, LaneBitmask LaneMask) {  in setRegUsed()  argument
52   LiveUnits.addRegMasked(Reg, LaneMask);  in setRegUsed()
75     SI.Reg = 0;  in init()
98 void RegScavenger::addRegUnits(BitVector &BV, MCRegister Reg) {  in addRegUnits()  argument
99   for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI)  in addRegUnits()
103 void RegScavenger::removeRegUnits(BitVector &BV, MCRegister Reg) {  in removeRegUnits()  argument
104   for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI)  in removeRegUnits()
137     MCRegister Reg = MO.getReg().asMCReg();  in determineKillsAndDefs()  local
144         addRegUnits(KillRegUnits, Reg);  in determineKillsAndDefs()
148         addRegUnits(KillRegUnits, Reg);  in determineKillsAndDefs()
150         addRegUnits(DefRegUnits, Reg);  in determineKillsAndDefs()
172     I.Reg = 0;  in forward()
186     Register Reg = MO.getReg();  in forward()  local
187     if (!Register::isPhysicalRegister(Reg) || isReserved(Reg))  in forward()
192       if (!isRegUsed(Reg)) {  in forward()
202         for (const MCPhysReg &SubReg : TRI->subregs(Reg))  in forward()
208         for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) {  in forward()
226       assert((KillRegs.test(Reg) || isUnused(Reg) ||  in forward()
227               isLiveInButUnusedBefore(Reg, MI, MBB, TRI, MRI)) &&  in forward()
248       I.Reg = 0;  in backward()
260 bool RegScavenger::isRegUsed(Register Reg, bool includeReserved) const {  in isRegUsed()  argument
261   if (isReserved(Reg))  in isRegUsed()
263   return !LiveUnits.available(Reg);  in isRegUsed()
267   for (Register Reg : *RC) {  in FindUnusedReg()
268     if (!isRegUsed(Reg)) {  in FindUnusedReg()
269       LLVM_DEBUG(dbgs() << "Scavenger found unused reg: " << printReg(Reg, TRI)  in FindUnusedReg()
271       return Reg;  in FindUnusedReg()
279   for (Register Reg : *RC)  in getRegsAvailable()
280     if (!isRegUsed(Reg))  in getRegsAvailable()
281       Mask.set(Reg);  in getRegsAvailable()
381       for (MCPhysReg Reg : AllocationOrder) {  in findSurvivorBackwards()  local
382         if (!MRI.isReserved(Reg) && Used.available(Reg) &&  in findSurvivorBackwards()
383             LiveOut.available(Reg))  in findSurvivorBackwards()
384           return std::make_pair(Reg, MBB.end());  in findSurvivorBackwards()
399         for (MCPhysReg Reg : AllocationOrder) {  in findSurvivorBackwards()  local
400           if (!MRI.isReserved(Reg) && Used.available(Reg)) {  in findSurvivorBackwards()
401             AvilableReg = Reg;  in findSurvivorBackwards()
445 RegScavenger::spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,  in spill()  argument
458     if (Scavenged[I].Reg != 0)  in spill()
488   Scavenged[SI].Reg = Reg;  in spill()
492   if (!TRI->saveScavengerRegister(*MBB, Before, UseMI, &RC, Reg)) {  in spill()
497                          TRI->getName(Reg) + " from class " +  in spill()
502     TII->storeRegToStackSlot(*MBB, Before, Reg, true, FI, &RC, TRI);  in spill()
509     TII->loadRegFromStackSlot(*MBB, UseMI, Reg, FI, &RC, TRI);  in spill()
539     if (SI.Reg) {  in scavengeRegister()
540       if (isRegUsed(SI.Reg)) {  in scavengeRegister()
542           dbgs() << "Removing " << printReg(SI.Reg, TRI) <<  in scavengeRegister()
544         for (MCRegAliasIterator AI(SI.Reg, TRI, true); AI.isValid(); ++AI)  in scavengeRegister()
572     assert(SI.Reg != SReg && "scavenged a previously scavenged register");  in scavengeRegister()
598   MCPhysReg Reg = P.first;  in scavengeRegisterBackwards()  local
601   if (Reg != 0 && SpillBefore == MBB.end()) {  in scavengeRegisterBackwards()
602     LLVM_DEBUG(dbgs() << "Scavenged free register: " << printReg(Reg, TRI)  in scavengeRegisterBackwards()
604     return Reg;  in scavengeRegisterBackwards()
610   assert(Reg != 0 && "No register left to scavenge!");  in scavengeRegisterBackwards()
617   ScavengedInfo &Scavenged = spill(Reg, RC, SPAdj, SpillBefore, ReloadBefore);  in scavengeRegisterBackwards()
619   LiveUnits.removeReg(Reg);  in scavengeRegisterBackwards()
620   LLVM_DEBUG(dbgs() << "Scavenged register with spill: " << printReg(Reg, TRI)  in scavengeRegisterBackwards()
622   return Reg;  in scavengeRegisterBackwards()
703         Register Reg = MO.getReg();  in scavengeFrameVirtualRegsInBlock()  local
707         if (!Register::isVirtualRegister(Reg) ||  in scavengeFrameVirtualRegsInBlock()
708             Register::virtReg2Index(Reg) >= InitialNumVirtRegs)  in scavengeFrameVirtualRegsInBlock()
713         Register SReg = scavengeVReg(MRI, RS, Reg, true);  in scavengeFrameVirtualRegsInBlock()
725       Register Reg = MO.getReg();  in scavengeFrameVirtualRegsInBlock()  local
727       if (!Register::isVirtualRegister(Reg) ||  in scavengeFrameVirtualRegsInBlock()
728           Register::virtReg2Index(Reg) >= InitialNumVirtRegs)  in scavengeFrameVirtualRegsInBlock()
739         Register SReg = scavengeVReg(MRI, RS, Reg, false);  in scavengeFrameVirtualRegsInBlock()