Lines Matching refs:PhysReg
368 MCRegister PhysReg; in tryAssign() local
369 for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) { in tryAssign()
375 PhysReg = *I; in tryAssign()
378 if (!PhysReg.isValid()) in tryAssign()
379 return PhysReg; in tryAssign()
401 uint8_t Cost = RegCosts[PhysReg]; in tryAssign()
405 return PhysReg; in tryAssign()
407 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is available at cost " in tryAssign()
410 return CheapReg ? CheapReg : PhysReg; in tryAssign()
421 MCRegister PhysReg; in canReassign() local
422 for (auto I = Order.begin(), E = Order.end(); I != E && !PhysReg; ++I) { in canReassign()
435 PhysReg = *I; in canReassign()
437 if (PhysReg) in canReassign()
440 << printReg(PhysReg, TRI) << '\n'); in canReassign()
441 return PhysReg; in canReassign()
448 MCRegister PhysReg, in evictInterference() argument
455 LLVM_DEBUG(dbgs() << "evicting " << printReg(PhysReg, TRI) in evictInterference()
460 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in evictInterference()
488 bool RegAllocEvictionAdvisor::isUnusedCalleeSavedReg(MCRegister PhysReg) const { in isUnusedCalleeSavedReg()
489 MCRegister CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg); in isUnusedCalleeSavedReg()
493 return !Matrix->isPhysRegUsed(PhysReg); in isUnusedCalleeSavedReg()
524 MCRegister PhysReg) const { in canAllocatePhysReg()
525 if (RegCosts[PhysReg] >= CostPerUseLimit) in canAllocatePhysReg()
529 if (CostPerUseLimit == 1 && isUnusedCalleeSavedReg(PhysReg)) { in canAllocatePhysReg()
531 dbgs() << printReg(PhysReg, TRI) << " would clobber CSR " in canAllocatePhysReg()
532 << printReg(RegClassInfo.getLastCalleeSavedAlias(PhysReg), TRI) in canAllocatePhysReg()
731 if (Cand.PhysReg) { in growRegion()
1047 for (MCPhysReg PhysReg : Order) { in calculateRegionSplitCost() local
1048 assert(PhysReg); in calculateRegionSplitCost()
1049 if (IgnoreCSR && EvictAdvisor->isUnusedCalleeSavedReg(PhysReg)) in calculateRegionSplitCost()
1058 if (CandIndex == BestCand || !GlobalCand[CandIndex].PhysReg) in calculateRegionSplitCost()
1075 Cand.reset(IntfCache, PhysReg); in calculateRegionSplitCost()
1080 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tno positive bundles\n"); in calculateRegionSplitCost()
1083 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tstatic = "; in calculateRegionSplitCost()
1091 << printReg(GlobalCand[BestCand].PhysReg, TRI) << '\n'; in calculateRegionSplitCost()
1143 LLVM_DEBUG(dbgs() << "Split for " << printReg(Cand.PhysReg, TRI) << " in " in doRegionSplit()
1152 assert(!Cand.PhysReg && "Compact region has no physreg"); in doRegionSplit()
1302 void RAGreedy::calcGapWeights(MCRegister PhysReg, in calcGapWeights() argument
1318 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in calcGapWeights()
1353 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in calcGapWeights()
1470 for (MCPhysReg PhysReg : Order) { in tryLocalSplit() local
1471 assert(PhysReg); in tryLocalSplit()
1474 calcGapWeights(PhysReg, GapWeight); in tryLocalSplit()
1477 if (Matrix->checkRegMaskInterference(VirtReg, PhysReg)) in tryLocalSplit()
1496 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << ' ' << Uses[SplitBefore] in tryLocalSplit()
1623 Register PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs); in trySplit() local
1624 if (PhysReg || !NewVRegs.empty()) in trySplit()
1625 return PhysReg; in trySplit()
1638 MCRegister PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs); in trySplit() local
1639 if (PhysReg || !NewVRegs.empty()) in trySplit()
1640 return PhysReg; in trySplit()
1664 MCRegister PhysReg, in assignedRegPartiallyOverlaps() argument
1667 if (PhysReg == AssignedReg) in assignedRegPartiallyOverlaps()
1669 return TRI.regsOverlap(PhysReg, AssignedReg); in assignedRegPartiallyOverlaps()
1681 MCRegister PhysReg, const LiveInterval &VirtReg, in mayRecolorAllInterferences() argument
1685 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) { in mayRecolorAllInterferences()
1710 !assignedRegPartiallyOverlaps(*TRI, *VRM, PhysReg, *Intf)) && in mayRecolorAllInterferences()
1802 for (MCRegister PhysReg : Order) { in tryLastChanceRecoloring() local
1803 assert(PhysReg.isValid()); in tryLastChanceRecoloring()
1805 << printReg(PhysReg, TRI) << '\n'); in tryLastChanceRecoloring()
1810 if (Matrix->checkInterference(VirtReg, PhysReg) > in tryLastChanceRecoloring()
1820 if (!mayRecolorAllInterferences(PhysReg, VirtReg, RecoloringCandidates, in tryLastChanceRecoloring()
1846 Matrix->assign(VirtReg, PhysReg); in tryLastChanceRecoloring()
1860 return PhysReg; in tryLastChanceRecoloring()
1864 << printReg(PhysReg, TRI) << '\n'); in tryLastChanceRecoloring()
1888 MCRegister PhysReg; in tryLastChanceRecoloring() local
1889 std::tie(LI, PhysReg) = RecolorStack[I]; in tryLastChanceRecoloring()
1897 MCRegister PhysReg; in tryLastChanceRecoloring() local
1898 std::tie(LI, PhysReg) = RecolorStack[I]; in tryLastChanceRecoloring()
1900 Matrix->assign(*LI, PhysReg); in tryLastChanceRecoloring()
1927 MCRegister PhysReg = selectOrSplitImpl(*LI, NewVRegs, FixedRegisters, in tryRecoloringCandidates() local
1933 if (PhysReg == ~0u || (!PhysReg && !LI->empty())) in tryRecoloringCandidates()
1936 if (!PhysReg) { in tryRecoloringCandidates()
1943 << " succeeded with: " << printReg(PhysReg, TRI) << '\n'); in tryRecoloringCandidates()
1945 Matrix->assign(*LI, PhysReg); in tryRecoloringCandidates()
1988 const LiveInterval &VirtReg, AllocationOrder &Order, MCRegister PhysReg, in tryAssignCSRFirstTime() argument
1995 return PhysReg; in tryAssignCSRFirstTime()
2012 return PhysReg; in tryAssignCSRFirstTime()
2018 return PhysReg; in tryAssignCSRFirstTime()
2078 MCRegister PhysReg) { in getBrokenHintFreq() argument
2081 if (Info.PhysReg != PhysReg) in getBrokenHintFreq()
2103 MCRegister PhysReg = VRM->getPhys(Reg); in tryHintRecoloring() local
2110 << '(' << printReg(PhysReg, TRI) << ")\n"); in tryHintRecoloring()
2132 if (CurrPhys != PhysReg && (!MRI->getRegClass(Reg)->contains(PhysReg) || in tryHintRecoloring()
2133 Matrix->checkInterference(LI, PhysReg))) in tryHintRecoloring()
2144 if (CurrPhys != PhysReg) { in tryHintRecoloring()
2147 BlockFrequency NewCopiesCost = getBrokenHintFreq(Info, PhysReg); in tryHintRecoloring()
2161 Matrix->assign(LI, PhysReg); in tryHintRecoloring()
2229 if (MCRegister PhysReg = in selectOrSplitImpl() local
2235 EvictAdvisor->isUnusedCalleeSavedReg(PhysReg) && NewVRegs.empty()) { in selectOrSplitImpl()
2236 MCRegister CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg, in selectOrSplitImpl()
2243 return PhysReg; in selectOrSplitImpl()
2254 if (Register PhysReg = in selectOrSplitImpl() local
2263 if (Hint && Hint != PhysReg) in selectOrSplitImpl()
2265 return PhysReg; in selectOrSplitImpl()
2283 Register PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters); in selectOrSplitImpl() local
2284 if (PhysReg || (NewVRegs.size() - NewVRegSizeBefore)) in selectOrSplitImpl()
2285 return PhysReg; in selectOrSplitImpl()