367                                const SmallVirtRegSet &FixedRegisters) {  in tryAssign()  argument
391                                                  FixedRegisters)) {  in tryAssign()
409   MCRegister CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters);  in tryAssign()
547                               const SmallVirtRegSet &FixedRegisters) {  in tryEvict()  argument
552       VirtReg, Order, CostPerUseLimit, FixedRegisters);  in tryEvict()
1613                             const SmallVirtRegSet &FixedRegisters) {  in trySplit()  argument
1682     SmallLISet &RecoloringCandidates, const SmallVirtRegSet &FixedRegisters) {  in mayRecolorAllInterferences()  argument
1713           FixedRegisters.count(Intf->reg())) {  in mayRecolorAllInterferences()
1770                                            SmallVirtRegSet &FixedRegisters,  in tryLastChanceRecoloring()  argument
1798   assert(!FixedRegisters.count(VirtReg.reg()));  in tryLastChanceRecoloring()
1799   FixedRegisters.insert(VirtReg.reg());  in tryLastChanceRecoloring()
1821                                     FixedRegisters)) {  in tryLastChanceRecoloring()
1851     SmallVirtRegSet SaveFixedRegisters(FixedRegisters);  in tryLastChanceRecoloring()
1853                                 FixedRegisters, RecolorStack, Depth)) {  in tryLastChanceRecoloring()
1867     FixedRegisters = SaveFixedRegisters;  in tryLastChanceRecoloring()
1921                                        SmallVirtRegSet &FixedRegisters,  in tryRecoloringCandidates()  argument
1927     MCRegister PhysReg = selectOrSplitImpl(*LI, NewVRegs, FixedRegisters,  in tryRecoloringCandidates()
1946     FixedRegisters.insert(LI->reg());  in tryRecoloringCandidates()
1959   SmallVirtRegSet FixedRegisters;  in selectOrSplit()  local
1962       selectOrSplitImpl(VirtReg, NewVRegs, FixedRegisters, RecolorStack);  in selectOrSplit()
2222                                        SmallVirtRegSet &FixedRegisters,  in selectOrSplitImpl()  argument
2230           tryAssign(VirtReg, Order, NewVRegs, FixedRegisters)) {  in selectOrSplitImpl()
2256                      FixedRegisters)) {  in selectOrSplitImpl()
2283     Register PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters);  in selectOrSplitImpl()
2291     return tryLastChanceRecoloring(VirtReg, Order, NewVRegs, FixedRegisters,  in selectOrSplitImpl()