Lines Matching refs:RegisterRef

120       if (MI != Reg && aliasMM(RegisterRef(Reg), RegisterRef(MI)))  in getAliasSet()
130 if (aliasRM(RegisterRef(Reg), RegisterRef(MI))) in getAliasSet()
136 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR()
167 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const { in aliasRM()
202 bool PhysicalRegisterInfo::aliasMM(RegisterRef RM, RegisterRef RN) const { in aliasMM()
230 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const { in mapTo()
234 return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask)); in mapTo()
240 return RegisterRef(R, M & RCM); in mapTo()
245 bool RegisterAggr::hasAliasOf(RegisterRef RR) const { in hasAliasOf()
258 bool RegisterAggr::hasCoverOf(RegisterRef RR) const { in hasCoverOf()
273 RegisterAggr &RegisterAggr::insert(RegisterRef RR) { in insert()
292 RegisterAggr &RegisterAggr::intersect(RegisterRef RR) { in intersect()
301 RegisterAggr &RegisterAggr::clear(RegisterRef RR) { in clear()
310 RegisterRef RegisterAggr::intersectWith(RegisterRef RR) const { in intersectWith()
314 return RegisterRef(); in intersectWith()
315 RegisterRef NR = T.makeRegRef(); in intersectWith()
320 RegisterRef RegisterAggr::clearIn(RegisterRef RR) const { in clearIn()
324 RegisterRef RegisterAggr::makeRegRef() const { in makeRegRef()
327 return RegisterRef(); in makeRegRef()
349 return RegisterRef(); in makeRegRef()
357 return RegisterRef(F, M); in makeRegRef()
371 RegisterRef R = RG.PRI.getRefForUnit(U); in rr_iterator()