167 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const {  in aliasRM()  argument
168   assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg));  in aliasRM()
170   bool Preserved = MB[RR.Reg/32] & (1u << (RR.Reg%32));  in aliasRM()
174   if (RR.Mask == LaneBitmask::getAll())  in aliasRM()
176   const TargetRegisterClass *RC = RegInfos[RR.Reg].RegClass;  in aliasRM()
177   if (RC != nullptr && (RR.Mask & RC->LaneMask) == RC->LaneMask)  in aliasRM()
185   LaneBitmask M = RR.Mask;  in aliasRM()
186   for (MCSubRegIndexIterator SI(RR.Reg, &TRI); SI.isValid(); ++SI) {  in aliasRM()
188     if ((SM & RR.Mask).none())  in aliasRM()
230 RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const {  in mapTo()  argument
231   if (RR.Reg == R)  in mapTo()
232     return RR;  in mapTo()
233   if (unsigned Idx = TRI.getSubRegIndex(R, RR.Reg))  in mapTo()
234     return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask));  in mapTo()
235   if (unsigned Idx = TRI.getSubRegIndex(RR.Reg, R)) {  in mapTo()
239     LaneBitmask M = TRI.reverseComposeSubRegIndexLaneMask(Idx, RR.Mask);  in mapTo()
245 bool RegisterAggr::hasAliasOf(RegisterRef RR) const {  in hasAliasOf()
246   if (PhysicalRegisterInfo::isRegMaskId(RR.Reg))  in hasAliasOf()
247     return Units.anyCommon(PRI.getMaskUnits(RR.Reg));  in hasAliasOf()
249   for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {  in hasAliasOf()
251     if (P.second.none() || (P.second & RR.Mask).any())  in hasAliasOf()
258 bool RegisterAggr::hasCoverOf(RegisterRef RR) const {  in hasCoverOf()
259   if (PhysicalRegisterInfo::isRegMaskId(RR.Reg)) {  in hasCoverOf()
260     BitVector T(PRI.getMaskUnits(RR.Reg));  in hasCoverOf()
264   for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {  in hasCoverOf()
266     if (P.second.none() || (P.second & RR.Mask).any())  in hasCoverOf()
273 RegisterAggr &RegisterAggr::insert(RegisterRef RR) {  in insert()  argument
274   if (PhysicalRegisterInfo::isRegMaskId(RR.Reg)) {  in insert()
275     Units |= PRI.getMaskUnits(RR.Reg);  in insert()
279   for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {  in insert()
281     if (P.second.none() || (P.second & RR.Mask).any())  in insert()
292 RegisterAggr &RegisterAggr::intersect(RegisterRef RR) {  in intersect()  argument
293   return intersect(RegisterAggr(PRI).insert(RR));  in intersect()
301 RegisterAggr &RegisterAggr::clear(RegisterRef RR) {  in clear()  argument
302   return clear(RegisterAggr(PRI).insert(RR));  in clear()
310 RegisterRef RegisterAggr::intersectWith(RegisterRef RR) const {  in intersectWith()
312   T.insert(RR).intersect(*this);  in intersectWith()
320 RegisterRef RegisterAggr::clearIn(RegisterRef RR) const {  in clearIn()
321   return RegisterAggr(PRI).insert(RR).clear(*this).makeRegRef();  in clearIn()