629   unsigned DefOp;  member
632   DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp)  in DataDep()
633     : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {}  in DataDep()
642     DefOp = DefI.getOperandNo();  in DataDep()
740   for (unsigned DefOp : LiveDefOps) {  in updatePhysDepsDownwards()  local
741     for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg().asMCReg(),  in updatePhysDepsDownwards()
746       LRU.Op = DefOp;  in updatePhysDepsDownwards()
804         .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);  in updateDepth()
959     UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI,  in pushDepHeight()
979 addLiveIns(const MachineInstr *DefMI, unsigned DefOp,  in addLiveIns()  argument
982   Register Reg = DefMI->getOperand(DefOp).getReg();  in addLiveIns()
1085             addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);  in computeInstrHeights()
1118           addLiveIns(Dep.DefMI, Dep.DefOp, Stack);  in computeInstrHeights()
1190     DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,  in getPHIDepth()