152   MachineInstr *DefInstr = nullptr;  in getOperandDef()  local
155     DefInstr = MRI->getUniqueVRegDef(MO.getReg());  in getOperandDef()
157   if (DefInstr && DefInstr->isPHI())  in getOperandDef()
158     DefInstr = nullptr;  in getOperandDef()
159   return DefInstr;  in getOperandDef()
233         MachineInstr *DefInstr = InsInstrs[II->second];  in getDepth()  local
234         assert(DefInstr &&  in getDepth()
237         int DefIdx = DefInstr->findRegisterDefOperandIdx(MO.getReg());  in getDepth()
239         LatencyOp = TSchedModel.computeOperandLatency(DefInstr, DefIdx,  in getDepth()
242         MachineInstr *DefInstr = getOperandDef(MO);  in getDepth()  local
243         if (DefInstr) {  in getDepth()
244           DepthOp = BlockTrace.getInstrCycles(*DefInstr).Depth;  in getDepth()
245           if (!isTransientMI(DefInstr))  in getDepth()
247                 DefInstr, DefInstr->findRegisterDefOperandIdx(MO.getReg()),  in getDepth()