Lines Matching refs:getReg
236 VRegs.push_back(MIRBuilder.buildMerge(NarrowTy, Pieces).getReg(0)); in extractVectorParts()
245 VRegs.push_back(MIRBuilder.buildMerge(LeftoverTy, Pieces).getReg(0)); in extractVectorParts()
319 Regs[StartIdx + I] = MI.getOperand(I).getReg(); in getUnmergeResults()
359 PadReg = MIRBuilder.buildConstant(GCDTy, 0).getReg(0); in buildLCMMergePieces()
361 PadReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in buildLCMMergePieces()
368 PadReg = MIRBuilder.buildAShr(GCDTy, VRegs.back(), ShiftAmt).getReg(0); in buildLCMMergePieces()
406 AllPadReg = MIRBuilder.buildUndef(NarrowTy).getReg(0); in buildLCMMergePieces()
408 AllPadReg = MIRBuilder.buildConstant(NarrowTy, 0).getReg(0); in buildLCMMergePieces()
424 Remerge[I] = MIRBuilder.buildMerge(NarrowTy, SubMerge).getReg(0); in buildLCMMergePieces()
600 Register VReg = MI.getOperand(0).getReg(); in isLibCallInTailPosition()
601 if (!VReg.isVirtual() || VReg != Next->getOperand(1).getReg()) in isLibCallInTailPosition()
604 Register PReg = Next->getOperand(0).getReg(); in isLibCallInTailPosition()
615 if (PReg != Ret->getOperand(0).getReg()) in isLibCallInTailPosition()
665 Args.push_back({MO.getReg(), OpType, 0}); in simpleLibcall()
667 {MI.getOperand(0).getReg(), OpType, 0}, Args); in simpleLibcall()
678 Register Reg = MI.getOperand(i).getReg(); in createMemLibcall()
785 {MI.getOperand(0).getReg(), ToType, 0}, in conversionLibcall()
786 {{MI.getOperand(1).getReg(), FromType, 0}}); in conversionLibcall()
791 LLT LLTy = MRI.getType(MI.getOperand(0).getReg()); in libcall()
843 Type *FromTy = getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(1).getReg())); in libcall()
844 Type *ToTy = getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(0).getReg())); in libcall()
855 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
856 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
870 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
871 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
902 uint64_t SizeOp0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in narrowScalar()
909 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
923 Register ImplicitReg = MIRBuilder.buildUndef(ImplicitTy).getReg(0); in narrowScalar()
934 DstRegs.push_back(MIRBuilder.buildUndef(NarrowTy).getReg(0)); in narrowScalar()
944 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in narrowScalar()
955 PartRegs.push_back(K.getReg(0)); in narrowScalar()
966 LeftoverRegs.push_back(K.getReg(0)); in narrowScalar()
969 insertParts(MI.getOperand(0).getReg(), in narrowScalar()
983 uint64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in narrowScalar()
990 MIRBuilder.buildCopy(MI.getOperand(0), Unmerge.getReg(0)); in narrowScalar()
999 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in narrowScalar()
1004 auto Unmerge = MIRBuilder.buildUnmerge(NarrowTy, MI.getOperand(1).getReg()); in narrowScalar()
1008 MIRBuilder.buildFreeze(NarrowTy, Unmerge.getReg(i)).getReg(0)); in narrowScalar()
1011 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), Parts); in narrowScalar()
1173 extractParts(MI.getOperand(i).getReg(), NarrowTy, NumParts, in narrowScalar()
1203 Register LHS = MI.getOperand(2).getReg(); in narrowScalar()
1221 if (!extractParts(MI.getOperand(3).getReg(), SrcTy, NarrowTy, Unused, in narrowScalar()
1227 Register Dst = MI.getOperand(0).getReg(); in narrowScalar()
1238 auto Xor = MIRBuilder.buildXor(NarrowTy, LHS, RHS).getReg(0); in narrowScalar()
1248 auto Xor = MIRBuilder.buildXor(LeftoverTy, LHS, RHS).getReg(0); in narrowScalar()
1295 MO1.setReg(TruncMIB.getReg(0)); in narrowScalar()
1331 .getReg(0); in narrowScalar()
1348 .getReg(0)); in narrowScalar()
1356 .getReg(0)); in narrowScalar()
1362 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
1375 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalar()
1380 DstRegs.push_back(DstPart.getReg(0)); in narrowScalar()
1421 return MIRBuilder.buildPtrToInt(NewTy, Val).getReg(0); in coerceToScalar()
1429 NewVal = MIRBuilder.buildPtrToInt(NewTy, NewVal).getReg(0); in coerceToScalar()
1430 return MIRBuilder.buildBitcast(NewTy, NewVal).getReg(0); in coerceToScalar()
1437 MO.setReg(ExtB.getReg(0)); in widenScalarSrc()
1444 MO.setReg(ExtB.getReg(0)); in narrowScalarSrc()
1469 Register Dst = MO.getReg(); in moreElementsVectorDst()
1479 MO.setReg(MIRBuilder.buildPadVectorWithUndefElements(MoreTy, MO).getReg(0)); in moreElementsVectorSrc()
1484 Op.setReg(MIRBuilder.buildBitcast(CastTy, Op).getReg(0)); in bitcastSrc()
1501 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues()
1506 Register Src1 = MI.getOperand(1).getReg(); in widenScalarMergeValues()
1519 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0); in widenScalarMergeValues()
1524 Register SrcReg = MI.getOperand(I).getReg(); in widenScalarMergeValues()
1578 Register SrcReg = MO.getReg(); in widenScalarMergeValues()
1584 Unmerges.push_back(Unmerge.getReg(J)); in widenScalarMergeValues()
1590 Register UndefReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in widenScalarMergeValues()
1601 NewMergeRegs.push_back(Merge.getReg(0)); in widenScalarMergeValues()
1610 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0)); in widenScalarMergeValues()
1624 Register SrcReg = MI.getOperand(NumDst).getReg(); in widenScalarUnmergeValues()
1629 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues()
1644 SrcReg = MIRBuilder.buildPtrToInt(SrcTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1652 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1681 WideSrc = MIRBuilder.buildAnyExt(LCMTy, WideSrc).getReg(0); in widenScalarUnmergeValues()
1716 MIB.addDef(MI.getOperand(Idx).getReg()); in widenScalarUnmergeValues()
1723 MIB.addUse(Unmerge.getReg(I)); in widenScalarUnmergeValues()
1728 extractGCDType(Parts, GCDTy, Unmerge.getReg(J)); in widenScalarUnmergeValues()
1737 MIRBuilder.buildMerge(MI.getOperand(I).getReg(), RemergeParts); in widenScalarUnmergeValues()
1749 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract()
1750 Register SrcReg = MI.getOperand(1).getReg(); in widenScalarExtract()
1864 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1869 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1874 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1879 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1900 LLT CarryOutTy = MRI.getType(MI.getOperand(1).getReg()); in widenScalarAddSubOverflow()
1904 .getReg(0); in widenScalarAddSubOverflow()
1906 NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}).getReg(0); in widenScalarAddSubOverflow()
1908 LLT OrigTy = MRI.getType(MI.getOperand(0).getReg()); in widenScalarAddSubOverflow()
1936 Register DstReg = MI.getOperand(0).getReg(); in widenScalarAddSubShlSat()
1974 Register Result = MI.getOperand(0).getReg(); in widenScalarMulo()
1975 Register OriginalOverflow = MI.getOperand(1).getReg(); in widenScalarMulo()
1976 Register LHS = MI.getOperand(2).getReg(); in widenScalarMulo()
1977 Register RHS = MI.getOperand(3).getReg(); in widenScalarMulo()
2106 Register SrcReg = MI.getOperand(1).getReg(); in widenScalar()
2145 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2168 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2313 bool IsVec = MRI.getType(MI.getOperand(1).getReg()).isVector(); in widenScalar()
2363 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in widenScalar()
2380 MRI.getType(MI.getOperand(0).getReg())); in widenScalar()
2401 auto IntCst = MIRBuilder.buildConstant(MI.getOperand(0).getReg(), Val); in widenScalar()
2469 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2494 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2623 Pieces.push_back(Unmerge.getReg(I)); in getUnmergePieces()
2628 Register Dst = MI.getOperand(0).getReg(); in lowerBitcast()
2629 Register Src = MI.getOperand(1).getReg(); in lowerBitcast()
2674 SrcReg = MIRBuilder.buildBitcast(DstCastTy, SrcReg).getReg(0); in lowerBitcast()
2713 B.buildConstant(IdxTy, Log2_32(OldEltSize))).getReg(0); in getBitcastWiderVectorElementOffset()
2728 Register Dst = MI.getOperand(0).getReg(); in bitcastExtractVectorElt()
2729 Register SrcVec = MI.getOperand(1).getReg(); in bitcastExtractVectorElt()
2730 Register Idx = MI.getOperand(2).getReg(); in bitcastExtractVectorElt()
2739 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastExtractVectorElt()
2771 NewOps[I] = Elt.getReg(0); in bitcastExtractVectorElt()
2812 ScaledIdx).getReg(0); in bitcastExtractVectorElt()
2854 return B.buildOr(TargetTy, MaskedOldElt, ShiftedInsertVal).getReg(0); in buildBitFieldInsert()
2868 Register Dst = MI.getOperand(0).getReg(); in bitcastInsertVectorElt()
2869 Register SrcVec = MI.getOperand(1).getReg(); in bitcastInsertVectorElt()
2870 Register Val = MI.getOperand(2).getReg(); in bitcastInsertVectorElt()
2871 Register Idx = MI.getOperand(3).getReg(); in bitcastInsertVectorElt()
2884 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastInsertVectorElt()
2904 ScaledIdx).getReg(0); in bitcastInsertVectorElt()
2915 CastTy, CastVec, InsertedElt, ScaledIdx).getReg(0); in bitcastInsertVectorElt()
3091 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in lowerStore()
3136 SrcReg = MIRBuilder.buildPtrToInt(IntPtrTy, SrcReg).getReg(0); in lowerStore()
3200 if (MRI.getType(MI.getOperand(1).getReg()).isVector()) { in bitcast()
3250 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3270 Register Res = MI.getOperand(0).getReg(); in lower()
3271 Register Overflow = MI.getOperand(1).getReg(); in lower()
3272 Register LHS = MI.getOperand(2).getReg(); in lower()
3273 Register RHS = MI.getOperand(3).getReg(); in lower()
3304 Register Res = MI.getOperand(0).getReg(); in lower()
3313 Register SubByReg = MI.getOperand(1).getReg(); in lower()
3319 Register Res = MI.getOperand(0).getReg(); in lower()
3327 Register LHS = MI.getOperand(1).getReg(); in lower()
3328 Register RHS = MI.getOperand(2).getReg(); in lower()
3348 Register OldValRes = MI.getOperand(0).getReg(); in lower()
3349 Register SuccessRes = MI.getOperand(1).getReg(); in lower()
3350 Register Addr = MI.getOperand(2).getReg(); in lower()
3351 Register CmpVal = MI.getOperand(3).getReg(); in lower()
3352 Register NewVal = MI.getOperand(4).getReg(); in lower()
3372 Register Res = MI.getOperand(0).getReg(); in lower()
3373 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3374 Register LHS = MI.getOperand(2).getReg(); in lower()
3375 Register RHS = MI.getOperand(3).getReg(); in lower()
3384 Register Res = MI.getOperand(0).getReg(); in lower()
3385 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3386 Register LHS = MI.getOperand(2).getReg(); in lower()
3387 Register RHS = MI.getOperand(3).getReg(); in lower()
3388 Register CarryIn = MI.getOperand(4).getReg(); in lower()
3400 Register Res = MI.getOperand(0).getReg(); in lower()
3401 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3402 Register LHS = MI.getOperand(2).getReg(); in lower()
3403 Register RHS = MI.getOperand(3).getReg(); in lower()
3412 Register Res = MI.getOperand(0).getReg(); in lower()
3413 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3414 Register LHS = MI.getOperand(2).getReg(); in lower()
3415 Register RHS = MI.getOperand(3).getReg(); in lower()
3416 Register BorrowIn = MI.getOperand(4).getReg(); in lower()
3461 Register DstReg = MI.getOperand(0).getReg(); in lower()
3462 Register SrcReg = MI.getOperand(1).getReg(); in lower()
3495 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3502 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3572 return B.buildAnd(IdxTy, IdxReg, B.buildConstant(IdxTy, Imm)).getReg(0); in clampDynamicVectorIndex()
3576 .getReg(0); in clampDynamicVectorIndex()
3595 return MIRBuilder.buildPtrAdd(PtrTy, VecPtr, Mul).getReg(0); in getVectorElementPointer()
3607 LLT VecTy = MRI.getType(MI.getReg(0)); in hasSameNumEltsOnAllVectorOperands()
3620 LLT Ty = MRI.getType(Op.getReg()); in hasSameNumEltsOnAllVectorOperands()
3666 Ops.push_back(Op.getReg()); in broadcastSrcOp()
3694 unsigned OrigNumElts = MRI.getType(MI.getReg(0)).getNumElements(); in fewerElementsVectorMultiEltType()
3706 makeDstOps(OutputOpsPieces[i], MRI.getType(MI.getReg(i)), NumElts); in fewerElementsVectorMultiEltType()
3721 extractVectorParts(MI.getReg(UseIdx), NumElts, SplitPieces); in fewerElementsVectorMultiEltType()
3742 OutputRegs[DstNo].push_back(I.getReg(DstNo)); in fewerElementsVectorMultiEltType()
3748 mergeMixedSubvectors(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()
3751 MIRBuilder.buildMerge(MI.getReg(i), OutputRegs[i]); in fewerElementsVectorMultiEltType()
3761 unsigned OrigNumElts = MRI.getType(MI.getReg(0)).getNumElements(); in fewerElementsVectorPhi()
3768 makeDstOps(OutputOpsPieces, MRI.getType(MI.getReg(0)), NumElts); in fewerElementsVectorPhi()
3777 extractVectorParts(MI.getReg(UseIdx), NumElts, InputOpsPieces[UseNo]); in fewerElementsVectorPhi()
3787 OutputRegs.push_back(Phi.getReg(0)); in fewerElementsVectorPhi()
3797 mergeMixedSubvectors(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()
3799 MIRBuilder.buildMerge(MI.getReg(0), OutputRegs); in fewerElementsVectorPhi()
3811 const Register SrcReg = MI.getOperand(NumDst).getReg(); in fewerElementsVectorUnmergeValues()
3812 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in fewerElementsVectorUnmergeValues()
3847 MIB.addDef(MI.getOperand(I * PartsPerUnmerge + J).getReg()); in fewerElementsVectorUnmergeValues()
3848 MIB.addUse(Unmerge.getReg(I)); in fewerElementsVectorUnmergeValues()
3858 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorMerge()
3860 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); in fewerElementsVectorMerge()
3889 LLT EltTy = MRI.getType(MI.getOperand(1).getReg()).getScalarType(); in fewerElementsVectorMerge()
3891 auto Unmerge = MIRBuilder.buildUnmerge(EltTy, MI.getOperand(i).getReg()); in fewerElementsVectorMerge()
3893 Elts.push_back(Unmerge.getReg(j)); in fewerElementsVectorMerge()
3902 NarrowTyElts.push_back(MIRBuilder.buildMerge(NarrowTy, Pieces).getReg(0)); in fewerElementsVectorMerge()
3932 Sources.push_back(MI.getOperand(1 + i * NumElts + j).getReg()); in fewerElementsVectorMerge()
3933 NarrowTyElts.push_back(MIRBuilder.buildMerge(NarrowTy, Sources).getReg(0)); in fewerElementsVectorMerge()
3945 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3946 Register SrcVec = MI.getOperand(1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3952 InsertVal = MI.getOperand(2).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3954 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3995 VecParts[PartIdx] = InsertPart.getReg(0); in fewerElementsVectorExtractInsertVectorElt()
4029 Register ValReg = LdStMI.getReg(0); in reduceLoadStoreWidth()
4222 if (MRI.getType(MI.getOperand(1).getReg()).isVector()) in fewerElementsVector()
4259 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorShuffle()
4260 Register Src1Reg = MI.getOperand(1).getReg(); in fewerElementsVectorShuffle()
4261 Register Src2Reg = MI.getOperand(2).getReg(); in fewerElementsVectorShuffle()
4357 SVOps.push_back(MIRBuilder.buildUndef(EltTy).getReg(0)); in fewerElementsVectorShuffle()
4369 .getReg(0)); in fewerElementsVectorShuffle()
4373 Output = MIRBuilder.buildBuildVector(NarrowTy, SVOps).getReg(0); in fewerElementsVectorShuffle()
4376 Output = MIRBuilder.buildUndef(NarrowTy).getReg(0); in fewerElementsVectorShuffle()
4381 ? MIRBuilder.buildUndef(NarrowTy).getReg(0) in fewerElementsVectorShuffle()
4384 Output = MIRBuilder.buildShuffleVector(NarrowTy, Op0, Op1, Ops).getReg(0); in fewerElementsVectorShuffle()
4455 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorReductions()
4457 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorReductions()
4486 .getReg(0)); in fewerElementsVectorReductions()
4501 .getReg(0); in fewerElementsVectorReductions()
4509 MIRBuilder.buildInstr(Opc, {DstTy}, {SplitSrcs[Part]}).getReg(0)); in fewerElementsVectorReductions()
4528 .getReg(0); in fewerElementsVectorReductions()
4552 MIRBuilder.buildInstr(ScalarOpc, {NarrowTy}, {LHS, RHS}).getReg(0); in tryNarrowPow2Reduction()
4663 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarShift()
4668 Register Amt = MI.getOperand(2).getReg(); in narrowScalarShift()
4720 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4721 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4749 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4750 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4864 Register DstReg = MI.getOperand(0).getReg(); in moreElementsVector()
4865 Register CondReg = MI.getOperand(1).getReg(); in moreElementsVector()
4877 MI.getOperand(1).setReg(ShufSplat.getReg(0)); in moreElementsVector()
4901 Elts.push_back(Op.getReg()); in moreElementsVector()
4909 MI.getOperand(0).getReg(), MIRBuilder.buildInstr(Opc, {MoreTy}, Elts)); in moreElementsVector()
4931 Register DstReg = MI.getOperand(0).getReg(); in moreElementsVectorShuffle()
4932 Register Src1Reg = MI.getOperand(1).getReg(); in moreElementsVectorShuffle()
4933 Register Src2Reg = MI.getOperand(2).getReg(); in moreElementsVectorShuffle()
4961 MIRBuilder.buildShuffleVector(MI.getOperand(0).getReg(), in moreElementsVectorShuffle()
4962 MI.getOperand(1).getReg(), in moreElementsVectorShuffle()
4963 MI.getOperand(2).getReg(), NewMask); in moreElementsVectorShuffle()
4978 B.buildMul(NarrowTy, Src1Regs[DstIdx], Src2Regs[DstIdx]).getReg(0); in multiplyRegisters()
4990 Factors.push_back(Mul.getReg(0)); in multiplyRegisters()
4997 Factors.push_back(Umulh.getReg(0)); in multiplyRegisters()
5009 FactorSum = Uaddo.getReg(0); in multiplyRegisters()
5010 CarrySum = B.buildZExt(NarrowTy, Uaddo.getReg(1)).getReg(0); in multiplyRegisters()
5014 FactorSum = Uaddo.getReg(0); in multiplyRegisters()
5015 MachineInstrBuilder Carry = B.buildZExt(NarrowTy, Uaddo.getReg(1)); in multiplyRegisters()
5016 CarrySum = B.buildAdd(NarrowTy, CarrySum, Carry).getReg(0); in multiplyRegisters()
5020 FactorSum = B.buildAdd(NarrowTy, Factors[0], Factors[1]).getReg(0); in multiplyRegisters()
5022 FactorSum = B.buildAdd(NarrowTy, FactorSum, Factors[i]).getReg(0); in multiplyRegisters()
5037 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarAddSub()
5074 Register Src1 = MI.getOperand(NumDefs).getReg(); in narrowScalarAddSub()
5075 Register Src2 = MI.getOperand(NumDefs + 1).getReg(); in narrowScalarAddSub()
5078 CarryDst = MI.getOperand(1).getReg(); in narrowScalarAddSub()
5080 CarryIn = MI.getOperand(NumDefs + 2).getReg(); in narrowScalarAddSub()
5082 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarAddSub()
5117 insertParts(MI.getOperand(0).getReg(), RegTy, NarrowTy, in narrowScalarAddSub()
5127 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarMul()
5128 Register Src1 = MI.getOperand(1).getReg(); in narrowScalarMul()
5129 Register Src2 = MI.getOperand(2).getReg(); in narrowScalarMul()
5165 Register Src = MI.getOperand(1).getReg(); in narrowScalarFPTOI()
5190 int64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in narrowScalarExtract()
5199 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalarExtract()
5201 Register OpReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5238 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5258 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarInsert()
5260 extractParts(MI.getOperand(1).getReg(), RegTy, NarrowTy, LeftoverTy, SrcRegs, in narrowScalarInsert()
5267 Register OpReg = MI.getOperand(2).getReg(); in narrowScalarInsert()
5321 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarInsert()
5336 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarBasic()
5345 if (!extractParts(MI.getOperand(1).getReg(), DstTy, NarrowTy, LeftoverTy, in narrowScalarBasic()
5350 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, Unused, in narrowScalarBasic()
5357 DstRegs.push_back(Inst.getReg(0)); in narrowScalarBasic()
5364 DstLeftoverRegs.push_back(Inst.getReg(0)); in narrowScalarBasic()
5380 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExt()
5381 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarExt()
5402 Register CondReg = MI.getOperand(1).getReg(); in narrowScalarSelect()
5407 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarSelect()
5414 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, LeftoverTy, in narrowScalarSelect()
5419 if (!extractParts(MI.getOperand(3).getReg(), DstTy, NarrowTy, Unused, in narrowScalarSelect()
5426 DstRegs.push_back(Select.getReg(0)); in narrowScalarSelect()
5432 DstLeftoverRegs.push_back(Select.getReg(0)); in narrowScalarSelect()
5448 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTLZ()
5449 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTLZ()
5462 UnmergeSrc.getReg(1), C_0); in narrowScalarCTLZ()
5464 B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0)) : in narrowScalarCTLZ()
5465 B.buildCTLZ(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTLZ()
5468 auto HiCTLZ = B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTLZ()
5484 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTTZ()
5485 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTTZ()
5498 UnmergeSrc.getReg(0), C_0); in narrowScalarCTTZ()
5500 B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1)) : in narrowScalarCTTZ()
5501 B.buildCTTZ(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTTZ()
5504 auto LoCTTZ = B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTTZ()
5520 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTPOP()
5522 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); in narrowScalarCTPOP()
5528 auto LoCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTPOP()
5529 auto HiCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTPOP()
5558 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5559 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5592 Op = MIBOp.getReg(0); in lowerBitCount()
5608 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5609 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5643 MI.getOperand(1).setReg(MIBTmp.getReg(0)); in lowerBitCount()
5647 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5694 B.buildLShr(MI.getOperand(0).getReg(), ResTmp, C_SizeM8); in lowerBitCount()
5717 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftWithInverse()
5718 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftWithInverse()
5719 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftWithInverse()
5720 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftWithInverse()
5736 Z = MIRBuilder.buildSub(Ty, Zero, Z).getReg(0); in lowerFunnelShiftWithInverse()
5742 Y = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse()
5743 X = MIRBuilder.buildLShr(Ty, X, One).getReg(0); in lowerFunnelShiftWithInverse()
5745 X = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse()
5746 Y = MIRBuilder.buildShl(Ty, Y, One).getReg(0); in lowerFunnelShiftWithInverse()
5749 Z = MIRBuilder.buildNot(ShTy, Z).getReg(0); in lowerFunnelShiftWithInverse()
5759 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftAsShifts()
5760 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftAsShifts()
5761 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftAsShifts()
5762 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftAsShifts()
5778 ShAmt = MIRBuilder.buildURem(ShTy, Z, BitWidthC).getReg(0); in lowerFunnelShiftAsShifts()
5779 InvShAmt = MIRBuilder.buildSub(ShTy, BitWidthC, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5780 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5781 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5788 ShAmt = MIRBuilder.buildAnd(ShTy, Z, Mask).getReg(0); in lowerFunnelShiftAsShifts()
5791 InvShAmt = MIRBuilder.buildAnd(ShTy, NotZ, Mask).getReg(0); in lowerFunnelShiftAsShifts()
5794 ShAmt = MIRBuilder.buildURem(ShTy, Z, BitWidthC).getReg(0); in lowerFunnelShiftAsShifts()
5795 InvShAmt = MIRBuilder.buildSub(ShTy, Mask, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5800 ShX = MIRBuilder.buildShl(Ty, X, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5802 ShY = MIRBuilder.buildLShr(Ty, ShY1, InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5805 ShX = MIRBuilder.buildShl(Ty, ShX1, InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5806 ShY = MIRBuilder.buildLShr(Ty, Y, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5821 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShift()
5823 LLT ShTy = MRI.getType(MI.getOperand(3).getReg()); in lowerFunnelShift()
5841 Register Dst = MI.getOperand(0).getReg(); in lowerRotateWithReverseRotate()
5842 Register Src = MI.getOperand(1).getReg(); in lowerRotateWithReverseRotate()
5843 Register Amt = MI.getOperand(2).getReg(); in lowerRotateWithReverseRotate()
5855 Register Dst = MI.getOperand(0).getReg(); in lowerRotate()
5856 Register Src = MI.getOperand(1).getReg(); in lowerRotate()
5857 Register Amt = MI.getOperand(2).getReg(); in lowerRotate()
5889 Amt = MIRBuilder.buildNeg(DstTy, Amt).getReg(0); in lowerRotate()
5905 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0); in lowerRotate()
5908 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Src, RevAmt}).getReg(0); in lowerRotate()
5914 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0); in lowerRotate()
5919 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Inner, RevAmt}).getReg(0); in lowerRotate()
5930 Register Dst = MI.getOperand(0).getReg(); in lowerU64ToF32BitOps()
5931 Register Src = MI.getOperand(1).getReg(); in lowerU64ToF32BitOps()
5986 Register Dst = MI.getOperand(0).getReg(); in lowerUITOFP()
5987 Register Src = MI.getOperand(1).getReg(); in lowerUITOFP()
6014 Register Dst = MI.getOperand(0).getReg(); in lowerSITOFP()
6015 Register Src = MI.getOperand(1).getReg(); in lowerSITOFP()
6060 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOUI()
6061 Register Src = MI.getOperand(1).getReg(); in lowerFPTOUI()
6103 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOSI()
6104 Register Src = MI.getOperand(1).getReg(); in lowerFPTOSI()
6172 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC_F64_TO_F16()
6173 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC_F64_TO_F16()
6185 Register U = Unmerge.getReg(0); in lowerFPTRUNC_F64_TO_F16()
6186 Register UH = Unmerge.getReg(1); in lowerFPTRUNC_F64_TO_F16()
6277 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC()
6278 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC()
6294 Register Dst = MI.getOperand(0).getReg(); in lowerFPOWI()
6295 Register Src0 = MI.getOperand(1).getReg(); in lowerFPOWI()
6296 Register Src1 = MI.getOperand(2).getReg(); in lowerFPOWI()
6321 Register Dst = MI.getOperand(0).getReg(); in lowerMinMax()
6322 Register Src0 = MI.getOperand(1).getReg(); in lowerMinMax()
6323 Register Src1 = MI.getOperand(2).getReg(); in lowerMinMax()
6337 Register Dst = MI.getOperand(0).getReg(); in lowerFCopySign()
6338 Register Src0 = MI.getOperand(1).getReg(); in lowerFCopySign()
6339 Register Src1 = MI.getOperand(2).getReg(); in lowerFCopySign()
6353 Register And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask).getReg(0); in lowerFCopySign()
6356 And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask).getReg(0); in lowerFCopySign()
6361 And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask).getReg(0); in lowerFCopySign()
6366 And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask).getReg(0); in lowerFCopySign()
6384 Register Dst = MI.getOperand(0).getReg(); in lowerFMinNumMaxNum()
6385 Register Src0 = MI.getOperand(1).getReg(); in lowerFMinNumMaxNum()
6386 Register Src1 = MI.getOperand(2).getReg(); in lowerFMinNumMaxNum()
6397 Src0 = MIRBuilder.buildFCanonicalize(Ty, Src0, MI.getFlags()).getReg(0); in lowerFMinNumMaxNum()
6400 Src1 = MIRBuilder.buildFCanonicalize(Ty, Src1, MI.getFlags()).getReg(0); in lowerFMinNumMaxNum()
6412 Register DstReg = MI.getOperand(0).getReg(); in lowerFMad()
6425 Register DstReg = MI.getOperand(0).getReg(); in lowerIntrinsicRound()
6426 Register X = MI.getOperand(1).getReg(); in lowerIntrinsicRound()
6458 Register DstReg = MI.getOperand(0).getReg(); in lowerFFloor()
6459 Register SrcReg = MI.getOperand(1).getReg(); in lowerFFloor()
6486 Register DstReg = MI.getOperand(0).getReg(); in lowerMergeValues()
6487 Register Src0Reg = MI.getOperand(1).getReg(); in lowerMergeValues()
6493 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); in lowerMergeValues()
6498 Register SrcReg = MI.getOperand(I).getReg(); in lowerMergeValues()
6527 Register SrcReg = MI.getOperand(NumDst).getReg(); in lowerUnmergeValues()
6528 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues()
6566 Register DstReg = MI.getOperand(0).getReg(); in lowerExtractInsertVectorElt()
6567 Register SrcVec = MI.getOperand(1).getReg(); in lowerExtractInsertVectorElt()
6570 InsertVal = MI.getOperand(2).getReg(); in lowerExtractInsertVectorElt()
6572 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in lowerExtractInsertVectorElt()
6584 SrcRegs[IdxVal] = MI.getOperand(2).getReg(); in lowerExtractInsertVectorElt()
6610 Register EltPtr = getVectorElementPointer(StackTemp.getReg(0), VecTy, Idx); in lowerExtractInsertVectorElt()
6638 Register DstReg = MI.getOperand(0).getReg(); in lowerShuffleVector()
6639 Register Src0Reg = MI.getOperand(1).getReg(); in lowerShuffleVector()
6640 Register Src1Reg = MI.getOperand(2).getReg(); in lowerShuffleVector()
6655 Val = MIRBuilder.buildUndef(DstTy).getReg(0); in lowerShuffleVector()
6670 Undef = MIRBuilder.buildUndef(EltTy).getReg(0); in lowerShuffleVector()
6683 BuildVec.push_back(Extract.getReg(0)); in lowerShuffleVector()
6699 Register Dst = MI.getOperand(0).getReg(); in lowerDynStackAlloc()
6700 Register AllocSize = MI.getOperand(1).getReg(); in lowerDynStackAlloc()
6731 Register Dst = MI.getOperand(0).getReg(); in lowerExtract()
6732 Register Src = MI.getOperand(1).getReg(); in lowerExtract()
6752 SubVectorElts.push_back(Unmerge.getReg(Idx)); in lowerExtract()
6770 Src = MIRBuilder.buildBitcast(SrcIntTy, Src).getReg(0); in lowerExtract()
6789 Register Dst = MI.getOperand(0).getReg(); in lowerInsert()
6790 Register Src = MI.getOperand(1).getReg(); in lowerInsert()
6791 Register InsertSrc = MI.getOperand(2).getReg(); in lowerInsert()
6810 DstElts.push_back(UnmergeSrc.getReg(Idx)); in lowerInsert()
6818 DstElts.push_back(UnmergeInsertSrc.getReg(i)); in lowerInsert()
6827 DstElts.push_back(UnmergeSrc.getReg(Idx)); in lowerInsert()
6853 Src = MIRBuilder.buildCast(IntDstTy, Src).getReg(0); in lowerInsert()
6858 InsertSrc = MIRBuilder.buildPtrToInt(IntInsertTy, InsertSrc).getReg(0); in lowerInsert()
6861 Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0); in lowerInsert()
6864 ExtInsSrc = MIRBuilder.buildShl(IntDstTy, ExtInsSrc, ShiftAmt).getReg(0); in lowerInsert()
6881 Register Dst0 = MI.getOperand(0).getReg(); in lowerSADDO_SSUBO()
6882 Register Dst1 = MI.getOperand(1).getReg(); in lowerSADDO_SSUBO()
6883 Register LHS = MI.getOperand(2).getReg(); in lowerSADDO_SSUBO()
6884 Register RHS = MI.getOperand(3).getReg(); in lowerSADDO_SSUBO()
6917 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToMinMax()
6918 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToMinMax()
6919 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToMinMax()
6983 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
6994 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToAddoSubo()
6995 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToAddoSubo()
6996 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToAddoSubo()
7029 Register Tmp = OverflowRes.getReg(0); in lowerAddSubSatToAddoSubo()
7030 Register Ov = OverflowRes.getReg(1); in lowerAddSubSatToAddoSubo()
7066 Register Res = MI.getOperand(0).getReg(); in lowerShlSat()
7067 Register LHS = MI.getOperand(1).getReg(); in lowerShlSat()
7068 Register RHS = MI.getOperand(2).getReg(); in lowerShlSat()
7096 Register Dst = MI.getOperand(0).getReg(); in lowerBswap()
7097 Register Src = MI.getOperand(1).getReg(); in lowerBswap()
7142 Register Dst = MI.getOperand(0).getReg(); in lowerBitreverse()
7143 Register Src = MI.getOperand(1).getReg(); in lowerBitreverse()
7179 Register ValReg = MI.getOperand(ValRegIndex).getReg(); in lowerReadWriteRegister()
7201 Register Result = MI.getOperand(0).getReg(); in lowerSMULH_UMULH()
7221 Register DstReg = MI.getOperand(0).getReg(); in lowerSelect()
7222 Register MaskReg = MI.getOperand(1).getReg(); in lowerSelect()
7223 Register Op1Reg = MI.getOperand(2).getReg(); in lowerSelect()
7224 Register Op2Reg = MI.getOperand(3).getReg(); in lowerSelect()
7239 MaskElt = MIRBuilder.buildSExtInReg(MaskTy, MaskElt, 1).getReg(0); in lowerSelect()
7244 MaskElt).getReg(0); in lowerSelect()
7248 MaskReg = ShufSplat.getReg(0); in lowerSelect()
7271 {MI.getOperand(0).getReg()}, {MI.getOperand(2), MI.getOperand(3)}); in lowerDIVREM()
7275 {MI.getOperand(1).getReg()}, {MI.getOperand(2), MI.getOperand(3)}); in lowerDIVREM()
7286 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in lowerAbsToAddXor()
7287 Register OpReg = MI.getOperand(1).getReg(); in lowerAbsToAddXor()
7292 MIRBuilder.buildXor(MI.getOperand(0).getReg(), Add, Shift); in lowerAbsToAddXor()
7303 Register SrcReg = MI.getOperand(1).getReg(); in lowerAbsToMaxNeg()
7305 auto Zero = MIRBuilder.buildConstant(Ty, 0).getReg(0); in lowerAbsToMaxNeg()
7306 auto Sub = MIRBuilder.buildSub(Ty, Zero, SrcReg).getReg(0); in lowerAbsToMaxNeg()
7314 Register SrcReg = MI.getOperand(1).getReg(); in lowerVectorReduction()
7421 return MIB.buildConstant(Ty, SplatVal).getReg(0); in getMemsetValue()
7428 return MIB.buildConstant(Ty, 0).getReg(0); in getMemsetValue()
7436 Val = MIB.buildMul(ExtType, ZExt, MagicMI).getReg(0); in getMemsetValue()
7441 Val = MIB.buildSplatVector(Ty, Val).getReg(0); in getMemsetValue()
7534 Value = MIB.buildTrunc(Ty, MemSetValue).getReg(0); in lowerMemset()
7547 Ptr = MIB.buildPtrAdd(PtrTy, Dst, Offset).getReg(0); in lowerMemset()
7563 Register Dst = MI.getOperand(0).getReg(); in lowerMemcpyInline()
7564 Register Src = MI.getOperand(1).getReg(); in lowerMemcpyInline()
7565 Register Len = MI.getOperand(2).getReg(); in lowerMemcpyInline()
7688 .getReg(0); in lowerMemcpy()
7689 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0); in lowerMemcpy()
7697 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0); in lowerMemcpy()
7787 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0); in lowerMemmove()
7789 LoadVals.push_back(MIB.buildLoad(CopyTy, LoadPtr, *LoadMMO).getReg(0)); in lowerMemmove()
7805 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0); in lowerMemmove()
7828 Register Dst = MI.getOperand(0).getReg(); in lowerMemCpyFamily()
7829 Register Src = MI.getOperand(1).getReg(); in lowerMemCpyFamily()
7830 Register Len = MI.getOperand(2).getReg(); in lowerMemCpyFamily()