Lines Matching refs:RegsToVisit
3226 SmallVector<Register, 8> RegsToVisit; in findCandidatesForLoadOrCombine() local
3249 RegsToVisit.push_back(OrLHS); in findCandidatesForLoadOrCombine()
3253 RegsToVisit.push_back(OrRHS); in findCandidatesForLoadOrCombine()
3258 if (RegsToVisit.empty() || RegsToVisit.size() % 2 != 0) in findCandidatesForLoadOrCombine()
3260 return RegsToVisit; in findCandidatesForLoadOrCombine()
3301 const SmallVector<Register, 8> &RegsToVisit, const unsigned MemSizeInBits) { in findLoadOffsetsForLoadOrCombine() argument
3333 for (auto Reg : RegsToVisit) { in findLoadOffsetsForLoadOrCombine()
3405 assert(Loads.size() == RegsToVisit.size() && in findLoadOffsetsForLoadOrCombine()
3458 auto RegsToVisit = findCandidatesForLoadOrCombine(&MI); in matchLoadOrCombine() local
3459 if (!RegsToVisit) in matchLoadOrCombine()
3465 const unsigned NarrowMemSizeInBits = WideMemSizeInBits / RegsToVisit->size(); in matchLoadOrCombine()
3480 MemOffset2Idx, *RegsToVisit, NarrowMemSizeInBits); in matchLoadOrCombine()