85   LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
246     const MachineOperand &Def = MI.getOperand(0);  in transferUsedLanes()  local
247     Register DefReg = Def.getReg();  in transferUsedLanes()
281   const MachineOperand &Def = *MI.defs().begin();  in transferDefinedLanesStep()  local
282   Register DefReg = Def.getReg();  in transferDefinedLanesStep()
292   DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes);  in transferDefinedLanesStep()
304 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,  in transferDefinedLanes()  argument
306   const MachineInstr &MI = *Def.getParent();  in transferDefinedLanes()
340   assert(Def.getSubReg() == 0 &&  in transferDefinedLanes()
342   DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());  in transferDefinedLanes()
352   const MachineOperand &Def = *MRI->def_begin(Reg);  in determineInitialDefinedLanes()  local
353   const MachineInstr &DefMI = *Def.getParent();  in determineInitialDefinedLanes()
361     if (Def.isDead())  in determineInitialDefinedLanes()
399       DefinedLanes |= transferDefinedLanes(Def, OpNum, MODefinedLanes);  in determineInitialDefinedLanes()
403   if (DefMI.isImplicitDef() || Def.isDead())  in determineInitialDefinedLanes()
406   assert(Def.getSubReg() == 0 &&  in determineInitialDefinedLanes()
424       const MachineOperand &Def = *UseMI.defs().begin();  in determineInitialUsedLanes()  local
425       Register DefReg = Def.getReg();  in determineInitialUsedLanes()
466   const MachineOperand &Def = MI.getOperand(0);  in isUndefInput()  local
467   Register DefReg = Def.getReg();  in isUndefInput()
508     MachineOperand &Def = *MRI->def_begin(Reg);  in runOnce()  local
509     const MachineInstr &MI = *Def.getParent();  in runOnce()