Lines Matching refs:Reg
70 unsigned Reg = *AI; in StartBlock() local
71 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
72 KillIndices[Reg] = BBSize; in StartBlock()
73 DefIndices[Reg] = ~0u; in StartBlock()
84 unsigned Reg = *I; in StartBlock() local
85 if (!IsReturnBlock && !Pristine.test(Reg)) in StartBlock()
88 unsigned Reg = *AI; in StartBlock() local
89 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in StartBlock()
90 KillIndices[Reg] = BBSize; in StartBlock()
91 DefIndices[Reg] = ~0u; in StartBlock()
114 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
115 if (KillIndices[Reg] != ~0u) { in Observe()
119 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
120 KillIndices[Reg] = Count; in Observe()
121 } else if (DefIndices[Reg] < InsertPosIndex && DefIndices[Reg] >= Count) { in Observe()
126 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in Observe()
130 DefIndices[Reg] = InsertPosIndex; in Observe()
184 Register Reg = MO.getReg(); in PrescanInstruction() local
185 if (Reg == 0) continue; in PrescanInstruction()
193 if (!Classes[Reg] && NewRC) in PrescanInstruction()
194 Classes[Reg] = NewRC; in PrescanInstruction()
195 else if (!NewRC || Classes[Reg] != NewRC) in PrescanInstruction()
196 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
199 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
206 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in PrescanInstruction()
211 if (Classes[Reg] != reinterpret_cast<TargetRegisterClass *>(-1)) in PrescanInstruction()
212 RegRefs.insert(std::make_pair(Reg, &MO)); in PrescanInstruction()
215 if (!KeepRegs.test(Reg)) { in PrescanInstruction()
216 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction()
226 Register Reg = MO.getReg(); in PrescanInstruction() local
227 if (!Reg.isValid()) in PrescanInstruction()
240 Classes[Reg] == reinterpret_cast<TargetRegisterClass *>(-1)) { in PrescanInstruction()
241 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in PrescanInstruction()
245 for (MCSuperRegIterator SuperRegs(Reg, TRI); in PrescanInstruction()
286 Register Reg = MO.getReg(); in ScanInstruction() local
287 if (Reg == 0) continue; in ScanInstruction()
296 bool Keep = KeepRegs.test(Reg); in ScanInstruction()
300 for (MCSubRegIterator SRI(Reg, TRI, true); SRI.isValid(); ++SRI) { in ScanInstruction()
310 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid(); ++SR) in ScanInstruction()
317 Register Reg = MO.getReg(); in ScanInstruction() local
318 if (Reg == 0) continue; in ScanInstruction()
327 if (!Classes[Reg] && NewRC) in ScanInstruction()
328 Classes[Reg] = NewRC; in ScanInstruction()
329 else if (!NewRC || Classes[Reg] != NewRC) in ScanInstruction()
330 Classes[Reg] = reinterpret_cast<TargetRegisterClass *>(-1); in ScanInstruction()
332 RegRefs.insert(std::make_pair(Reg, &MO)); in ScanInstruction()
336 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in ScanInstruction()
473 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
474 if (KillIndices[Reg] == ~0u) in BreakAntiDependencies()
475 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in BreakAntiDependencies()
621 Register Reg = MO.getReg(); in BreakAntiDependencies() local
622 if (Reg == 0) continue; in BreakAntiDependencies()
623 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
627 if (MO.isDef() && Reg != AntiDepReg) in BreakAntiDependencies()
628 ForbidRegs.push_back(Reg); in BreakAntiDependencies()