Lines Matching refs:lanes

142                                                             all lanes in its group.
154                                                             1, 2, 4, 8 or 16 lanes.
157 …                                          Reverses the lanes for groups of 2, 4, 8, 16 or 32 lanes.
1116 Selects which lanes to pull data from, within a group of 8 lanes. This is a mandatory modifier.
1132     dpp8:[{0..7},{0..7},{0..7},{0..7},{0..7},{0..7},{0..7},{0..7}]  Select lanes to read from.
1147 Controls interaction with inactive lanes for *dpp8* instructions. The default value is zero.
1149 Note: *inactive* lanes are those whose :ref:`exec<amdgpu_synid_exec>` mask bit is zero.
1156     fi:0                                 Fetch zero when accessing data from inactive lanes.
1157     fi:1                                 Fetch pre-exist values from inactive lanes.
1178 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1218 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1228                                              lanes in the row.
1256 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1298 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1324 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1355 Note: the lanes of a wavefront are organized in four *rows* and four *banks*.
1383 invalid lanes is disabled.
1388     bound_ctrl:1                             Enables data sharing with invalid lanes.
1399 Controls interaction with *inactive* lanes for *dpp16* instructions. The default value is zero.
1401 Note: *inactive* lanes are those whose :ref:`exec<amdgpu_synid_exec>` mask bit is zero.
1408     fi:0                                     Interaction with inactive lanes is controlled by
1411     fi:1                                     Fetch pre-exist values from inactive lanes.