Lines Matching +defs:write +defs:reg
688 static uint32_t size_and_rw_bits(nub_size_t size, bool read, bool write) { in size_and_rw_bits()
713 bool read, bool write) { in SetWatchpoint()
1011 bool write, in EnableHardwareWatchpoint()
1548 #define GPR_OFFSET(reg) (offsetof(DNBArchImplX86_64::GPR, __##reg)) argument
1549 #define FPU_OFFSET(reg) \ argument
1552 #define AVX_OFFSET(reg) \ argument
1555 #define AVX512F_OFFSET(reg) \ argument
1558 #define EXC_OFFSET(reg) \ argument
1564 #define GPR_SIZE(reg) (sizeof(((DNBArchImplX86_64::GPR *)NULL)->__##reg)) argument
1565 #define FPU_SIZE_UINT(reg) \ argument
1567 #define FPU_SIZE_MMST(reg) \ argument
1569 #define FPU_SIZE_XMM(reg) \ argument
1571 #define FPU_SIZE_YMM(reg) (32) argument
1572 #define FPU_SIZE_ZMM(reg) (64) argument
1573 #define EXC_SIZE(reg) (sizeof(((DNBArchImplX86_64::EXC *)NULL)->__##reg)) argument
1579 #define DEFINE_GPR(reg) \ argument
1585 #define DEFINE_GPR_ALT(reg, alt, gen) \ argument
1591 #define DEFINE_GPR_ALT2(reg, alt) \ argument
1597 #define DEFINE_GPR_ALT3(reg, alt, gen) \ argument
1603 #define DEFINE_GPR_ALT4(reg, alt, gen) \ argument
2029 #define ZMM_REG_DEF(reg) \ argument
2037 #define YMM_REG_ALIAS(reg) \ argument
2045 #define XMM_REG_ALIAS(reg) \ argument
2053 #define AVX512_K_REG_DEF(reg) \ argument
2278 bool DNBArchImplX86_64::GetRegisterValue(uint32_t set, uint32_t reg, in GetRegisterValue()
2489 bool DNBArchImplX86_64::SetRegisterValue(uint32_t set, uint32_t reg, in SetRegisterValue()